1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Support for Medifield PNW Camera Imaging ISP subsystem. 4 * 5 * Copyright (c) 2010 Intel Corporation. All Rights Reserved. 6 * 7 * Copyright (c) 2010 Silicon Hive www.siliconhive.com. 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License version 11 * 2 as published by the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * 19 */ 20 #ifndef __ATOMISP_INTERNAL_H__ 21 #define __ATOMISP_INTERNAL_H__ 22 23 #include "../../include/linux/atomisp_platform.h" 24 #include <linux/firmware.h> 25 #include <linux/kernel.h> 26 #include <linux/pm_qos.h> 27 #include <linux/idr.h> 28 29 #include <media/media-device.h> 30 #include <media/v4l2-subdev.h> 31 32 /* ISP2400*/ 33 #include "ia_css_types.h" 34 #include "sh_css_legacy.h" 35 36 #include "atomisp_csi2.h" 37 #include "atomisp_file.h" 38 #include "atomisp_subdev.h" 39 #include "atomisp_tpg.h" 40 #include "atomisp_compat.h" 41 42 #include "gp_device.h" 43 #include "irq.h" 44 #include <linux/vmalloc.h> 45 46 #define V4L2_EVENT_FRAME_END 5 47 48 #define IS_HWREVISION(isp, rev) \ 49 (((isp)->media_dev.hw_revision & ATOMISP_HW_REVISION_MASK) == \ 50 ((rev) << ATOMISP_HW_REVISION_SHIFT)) 51 52 #define MAX_STREAM_NUM 2 53 54 #define ATOMISP_PCI_DEVICE_SOC_MASK 0xfff8 55 /* MRFLD with 0x1178: ISP freq can burst to 457MHz */ 56 #define ATOMISP_PCI_DEVICE_SOC_MRFLD 0x1178 57 /* MRFLD with 0x1179: max ISP freq limited to 400MHz */ 58 #define ATOMISP_PCI_DEVICE_SOC_MRFLD_1179 0x1179 59 /* MRFLD with 0x117a: max ISP freq is 400MHz and max freq at Vmin is 200MHz */ 60 #define ATOMISP_PCI_DEVICE_SOC_MRFLD_117A 0x117a 61 #define ATOMISP_PCI_DEVICE_SOC_BYT 0x0f38 62 #define ATOMISP_PCI_DEVICE_SOC_ANN 0x1478 63 #define ATOMISP_PCI_DEVICE_SOC_CHT 0x22b8 64 65 #define ATOMISP_PCI_REV_MRFLD_A0_MAX 0 66 #define ATOMISP_PCI_REV_BYT_A0_MAX 4 67 68 #define ATOM_ISP_STEP_WIDTH 2 69 #define ATOM_ISP_STEP_HEIGHT 2 70 71 #define ATOM_ISP_MIN_WIDTH 4 72 #define ATOM_ISP_MIN_HEIGHT 4 73 #define ATOM_ISP_MAX_WIDTH UINT_MAX 74 #define ATOM_ISP_MAX_HEIGHT UINT_MAX 75 76 /* sub-QCIF resolution */ 77 #define ATOM_RESOLUTION_SUBQCIF_WIDTH 128 78 #define ATOM_RESOLUTION_SUBQCIF_HEIGHT 96 79 80 #define ATOM_ISP_MAX_WIDTH_TMP 1280 81 #define ATOM_ISP_MAX_HEIGHT_TMP 720 82 83 #define ATOM_ISP_I2C_BUS_1 4 84 #define ATOM_ISP_I2C_BUS_2 5 85 86 #define ATOM_ISP_POWER_DOWN 0 87 #define ATOM_ISP_POWER_UP 1 88 89 #define ATOM_ISP_MAX_INPUTS 4 90 91 #define ATOMISP_SC_TYPE_SIZE 2 92 93 #define ATOMISP_ISP_TIMEOUT_DURATION (2 * HZ) 94 #define ATOMISP_EXT_ISP_TIMEOUT_DURATION (6 * HZ) 95 #define ATOMISP_ISP_FILE_TIMEOUT_DURATION (60 * HZ) 96 #define ATOMISP_WDT_KEEP_CURRENT_DELAY 0 97 #define ATOMISP_ISP_MAX_TIMEOUT_COUNT 2 98 #define ATOMISP_CSS_STOP_TIMEOUT_US 200000 99 100 #define ATOMISP_CSS_Q_DEPTH 3 101 #define ATOMISP_CSS_EVENTS_MAX 16 102 #define ATOMISP_CONT_RAW_FRAMES 15 103 #define ATOMISP_METADATA_QUEUE_DEPTH_FOR_HAL 8 104 #define ATOMISP_S3A_BUF_QUEUE_DEPTH_FOR_HAL 8 105 106 #define ATOMISP_DELAYED_INIT_NOT_QUEUED 0 107 #define ATOMISP_DELAYED_INIT_QUEUED 1 108 #define ATOMISP_DELAYED_INIT_DONE 2 109 110 #define ATOMISP_CALC_CSS_PREV_OVERLAP(lines) \ 111 ((lines) * 38 / 100 & 0xfffffe) 112 113 /* 114 * Define how fast CPU should be able to serve ISP interrupts. 115 * The bigger the value, the higher risk that the ISP is not 116 * triggered sufficiently fast for it to process image during 117 * vertical blanking time, increasing risk of dropped frames. 118 * 1000 us is a reasonable value considering that the processing 119 * time is typically ~2000 us. 120 */ 121 #define ATOMISP_MAX_ISR_LATENCY 1000 122 123 /* Add new YUVPP pipe for SOC sensor. */ 124 #define ATOMISP_CSS_SUPPORT_YUVPP 1 125 126 #define ATOMISP_CSS_OUTPUT_SECOND_INDEX 1 127 #define ATOMISP_CSS_OUTPUT_DEFAULT_INDEX 0 128 129 /* 130 * ATOMISP_SOC_CAMERA 131 * This is to differentiate between ext-isp and soc camera in 132 * Moorefield/Baytrail platform. 133 */ 134 #define ATOMISP_SOC_CAMERA(asd) \ 135 (asd->isp->inputs[asd->input_curr].type == SOC_CAMERA \ 136 && asd->isp->inputs[asd->input_curr].camera_caps-> \ 137 sensor[asd->sensor_curr].stream_num == 1) 138 139 #define ATOMISP_USE_YUVPP(asd) \ 140 (ATOMISP_SOC_CAMERA(asd) && ATOMISP_CSS_SUPPORT_YUVPP && \ 141 !asd->copy_mode) 142 143 #define ATOMISP_DEPTH_SENSOR_STREAMON_COUNT 2 144 145 #define ATOMISP_DEPTH_DEFAULT_MASTER_SENSOR 0 146 #define ATOMISP_DEPTH_DEFAULT_SLAVE_SENSOR 1 147 148 /* ISP2401 */ 149 #define ATOMISP_ION_DEVICE_FD_OFFSET 16 150 #define ATOMISP_ION_SHARED_FD_MASK (0xFFFF) 151 #define ATOMISP_ION_DEVICE_FD_MASK (~ATOMISP_ION_SHARED_FD_MASK) 152 #define ION_FD_UNSET (-1) 153 154 #define DIV_NEAREST_STEP(n, d, step) \ 155 round_down((2 * (n) + (d) * (step)) / (2 * (d)), (step)) 156 157 struct atomisp_input_subdev { 158 unsigned int type; 159 enum atomisp_camera_port port; 160 struct v4l2_subdev *camera; 161 struct v4l2_subdev *motor; 162 struct v4l2_frmsizeenum frame_size; 163 164 /* 165 * To show this resource is used by 166 * which stream, in ISP multiple stream mode 167 */ 168 struct atomisp_sub_device *asd; 169 170 const struct atomisp_camera_caps *camera_caps; 171 int sensor_index; 172 }; 173 174 enum atomisp_dfs_mode { 175 ATOMISP_DFS_MODE_AUTO = 0, 176 ATOMISP_DFS_MODE_LOW, 177 ATOMISP_DFS_MODE_MAX, 178 }; 179 180 struct atomisp_regs { 181 /* PCI config space info */ 182 u16 pcicmdsts; 183 u32 ispmmadr; 184 u32 msicap; 185 u32 msi_addr; 186 u16 msi_data; 187 u8 intr; 188 u32 interrupt_control; 189 u32 pmcs; 190 u32 cg_dis; 191 u32 i_control; 192 193 /* I-Unit PHY related info */ 194 u32 csi_rcomp_config; 195 u32 csi_afe_dly; 196 u32 csi_control; 197 198 /* New for MRFLD */ 199 u32 csi_afe_rcomp_config; 200 u32 csi_afe_hs_control; 201 u32 csi_deadline_control; 202 u32 csi_access_viol; 203 }; 204 205 struct atomisp_sw_contex { 206 bool file_input; 207 int power_state; 208 int running_freq; 209 }; 210 211 #define ATOMISP_DEVICE_STREAMING_DISABLED 0 212 #define ATOMISP_DEVICE_STREAMING_ENABLED 1 213 #define ATOMISP_DEVICE_STREAMING_STOPPING 2 214 215 /* 216 * ci device struct 217 */ 218 struct atomisp_device { 219 struct device *dev; 220 struct v4l2_device v4l2_dev; 221 struct media_device media_dev; 222 struct atomisp_platform_data *pdata; 223 void *mmu_l1_base; 224 void __iomem *base; 225 const struct firmware *firmware; 226 227 struct pm_qos_request pm_qos; 228 s32 max_isr_latency; 229 230 /* 231 * ISP modules 232 * Multiple streams are represents by multiple 233 * atomisp_sub_device instances 234 */ 235 struct atomisp_sub_device *asd; 236 /* 237 * this will be assigned dyanamically. 238 * For Merr/BTY(ISP2400), 2 streams are supported. 239 */ 240 unsigned int num_of_streams; 241 242 struct atomisp_mipi_csi2_device csi2_port[ATOMISP_CAMERA_NR_PORTS]; 243 struct atomisp_tpg_device tpg; 244 struct atomisp_file_device file_dev; 245 246 /* Purpose of mutex is to protect and serialize use of isp data 247 * structures and css API calls. */ 248 struct rt_mutex mutex; 249 /* 250 * Serialise streamoff: mutex is dropped during streamoff to 251 * cancel the watchdog queue. MUST be acquired BEFORE 252 * "mutex". 253 */ 254 struct mutex streamoff_mutex; 255 256 unsigned int input_cnt; 257 struct atomisp_input_subdev inputs[ATOM_ISP_MAX_INPUTS]; 258 struct v4l2_subdev *flash; 259 struct v4l2_subdev *motor; 260 261 struct atomisp_regs saved_regs; 262 struct atomisp_sw_contex sw_contex; 263 struct atomisp_css_env css_env; 264 265 /* isp timeout status flag */ 266 bool isp_timeout; 267 bool isp_fatal_error; 268 struct workqueue_struct *wdt_work_queue; 269 struct work_struct wdt_work; 270 271 /* ISP2400 */ 272 atomic_t wdt_count; 273 274 atomic_t wdt_work_queued; 275 276 spinlock_t lock; /* Just for streaming below */ 277 278 bool need_gfx_throttle; 279 280 unsigned int mipi_frame_size; 281 const struct atomisp_dfs_config *dfs; 282 unsigned int hpll_freq; 283 284 bool css_initialized; 285 }; 286 287 #define v4l2_dev_to_atomisp_device(dev) \ 288 container_of(dev, struct atomisp_device, v4l2_dev) 289 290 extern struct device *atomisp_dev; 291 292 #define atomisp_is_wdt_running(a) timer_pending(&(a)->wdt) 293 294 /* ISP2401 */ 295 void atomisp_wdt_refresh_pipe(struct atomisp_video_pipe *pipe, 296 unsigned int delay); 297 void atomisp_wdt_refresh(struct atomisp_sub_device *asd, unsigned int delay); 298 299 /* ISP2400 */ 300 void atomisp_wdt_start(struct atomisp_sub_device *asd); 301 302 /* ISP2401 */ 303 void atomisp_wdt_start_pipe(struct atomisp_video_pipe *pipe); 304 void atomisp_wdt_stop_pipe(struct atomisp_video_pipe *pipe, bool sync); 305 306 void atomisp_wdt_stop(struct atomisp_sub_device *asd, bool sync); 307 308 #endif /* __ATOMISP_INTERNAL_H__ */ 309