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Searched defs:CLK_BASE (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/amd/display/dc/inc/hw/
Dclk_mgr_internal.h81 #define CLK_BASE(inst) \ macro
/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_resource.c307 #define CLK_BASE(seg) \ macro
/drivers/gpu/drm/amd/include/
Dnavi10_ip_offset.h43 static const struct IP_BASE CLK_BASE ={ { { { 0x00016C00, 0x00016E00, 0x00017000, 0x0001… variable
Dvega20_ip_offset.h45 static const struct IP_BASE CLK_BASE ={ { { { 0x00016C00, 0x00016E00, 0x00017000, 0x0001… variable
Dsienna_cichlid_ip_offset.h46 static const struct IP_BASE CLK_BASE = { { { { 0x00016C00, 0x02401800, 0, 0, 0 } }, variable
Dnavi12_ip_offset.h46 static const struct IP_BASE CLK_BASE ={ { { { 0x00016C00, 0x02401800, 0, 0, 0 } }, variable
Dnavi14_ip_offset.h46 static const struct IP_BASE CLK_BASE ={ { { { 0x00016C00, 0x02401800, 0, 0, 0 } }, variable
Dvega10_ip_offset.h203 static const struct IP_BASE CLK_BASE = { { { { 0x00016C00, 0, 0, 0, 0 } }, variable
Drenoir_ip_offset.h53 static const struct IP_BASE CLK_BASE ={ { { { 0x00016C00, 0x00016E00, 0x00017000, 0x00017E00, 0 } }, variable
Darct_ip_offset.h47 static const struct IP_BASE CLK_BASE ={ { { { 0x000120C0, 0x00016C00, 0x00401800, 0, 0, … variable