1# SPDX-License-Identifier: GPL-2.0-only 2 3menuconfig CRYPTO_HW 4 bool "Hardware crypto devices" 5 default y 6 help 7 Say Y here to get to see options for hardware crypto devices and 8 processors. This option alone does not add any kernel code. 9 10 If you say N, all options in this submenu will be skipped and disabled. 11 12if CRYPTO_HW 13 14source "drivers/crypto/allwinner/Kconfig" 15 16config CRYPTO_DEV_PADLOCK 17 tristate "Support for VIA PadLock ACE" 18 depends on X86 && !UML 19 help 20 Some VIA processors come with an integrated crypto engine 21 (so called VIA PadLock ACE, Advanced Cryptography Engine) 22 that provides instructions for very fast cryptographic 23 operations with supported algorithms. 24 25 The instructions are used only when the CPU supports them. 26 Otherwise software encryption is used. 27 28config CRYPTO_DEV_PADLOCK_AES 29 tristate "PadLock driver for AES algorithm" 30 depends on CRYPTO_DEV_PADLOCK 31 select CRYPTO_SKCIPHER 32 select CRYPTO_LIB_AES 33 help 34 Use VIA PadLock for AES algorithm. 35 36 Available in VIA C3 and newer CPUs. 37 38 If unsure say M. The compiled module will be 39 called padlock-aes. 40 41config CRYPTO_DEV_PADLOCK_SHA 42 tristate "PadLock driver for SHA1 and SHA256 algorithms" 43 depends on CRYPTO_DEV_PADLOCK 44 select CRYPTO_HASH 45 select CRYPTO_SHA1 46 select CRYPTO_SHA256 47 help 48 Use VIA PadLock for SHA1/SHA256 algorithms. 49 50 Available in VIA C7 and newer processors. 51 52 If unsure say M. The compiled module will be 53 called padlock-sha. 54 55config CRYPTO_DEV_GEODE 56 tristate "Support for the Geode LX AES engine" 57 depends on X86_32 && PCI 58 select CRYPTO_ALGAPI 59 select CRYPTO_SKCIPHER 60 help 61 Say 'Y' here to use the AMD Geode LX processor on-board AES 62 engine for the CryptoAPI AES algorithm. 63 64 To compile this driver as a module, choose M here: the module 65 will be called geode-aes. 66 67config ZCRYPT 68 tristate "Support for s390 cryptographic adapters" 69 depends on S390 70 select HW_RANDOM 71 help 72 Select this option if you want to enable support for 73 s390 cryptographic adapters like: 74 + Crypto Express 2 up to 7 Coprocessor (CEXxC) 75 + Crypto Express 2 up to 7 Accelerator (CEXxA) 76 + Crypto Express 4 up to 7 EP11 Coprocessor (CEXxP) 77 78config ZCRYPT_DEBUG 79 bool "Enable debug features for s390 cryptographic adapters" 80 default n 81 depends on DEBUG_KERNEL 82 depends on ZCRYPT 83 help 84 Say 'Y' here to enable some additional debug features on the 85 s390 cryptographic adapters driver. 86 87 There will be some more sysfs attributes displayed for ap cards 88 and queues and some flags on crypto requests are interpreted as 89 debugging messages to force error injection. 90 91 Do not enable on production level kernel build. 92 93 If unsure, say N. 94 95config ZCRYPT_MULTIDEVNODES 96 bool "Support for multiple zcrypt device nodes" 97 default y 98 depends on S390 99 depends on ZCRYPT 100 help 101 With this option enabled the zcrypt device driver can 102 provide multiple devices nodes in /dev. Each device 103 node can get customized to limit access and narrow 104 down the use of the available crypto hardware. 105 106config PKEY 107 tristate "Kernel API for protected key handling" 108 depends on S390 109 depends on ZCRYPT 110 help 111 With this option enabled the pkey kernel module provides an API 112 for creation and handling of protected keys. Other parts of the 113 kernel or userspace applications may use these functions. 114 115 Select this option if you want to enable the kernel and userspace 116 API for proteced key handling. 117 118 Please note that creation of protected keys from secure keys 119 requires to have at least one CEX card in coprocessor mode 120 available at runtime. 121 122config CRYPTO_PAES_S390 123 tristate "PAES cipher algorithms" 124 depends on S390 125 depends on ZCRYPT 126 depends on PKEY 127 select CRYPTO_ALGAPI 128 select CRYPTO_SKCIPHER 129 help 130 This is the s390 hardware accelerated implementation of the 131 AES cipher algorithms for use with protected key. 132 133 Select this option if you want to use the paes cipher 134 for example to use protected key encrypted devices. 135 136config CRYPTO_SHA1_S390 137 tristate "SHA1 digest algorithm" 138 depends on S390 139 select CRYPTO_HASH 140 help 141 This is the s390 hardware accelerated implementation of the 142 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2). 143 144 It is available as of z990. 145 146config CRYPTO_SHA256_S390 147 tristate "SHA256 digest algorithm" 148 depends on S390 149 select CRYPTO_HASH 150 help 151 This is the s390 hardware accelerated implementation of the 152 SHA256 secure hash standard (DFIPS 180-2). 153 154 It is available as of z9. 155 156config CRYPTO_SHA512_S390 157 tristate "SHA384 and SHA512 digest algorithm" 158 depends on S390 159 select CRYPTO_HASH 160 help 161 This is the s390 hardware accelerated implementation of the 162 SHA512 secure hash standard. 163 164 It is available as of z10. 165 166config CRYPTO_SHA3_256_S390 167 tristate "SHA3_224 and SHA3_256 digest algorithm" 168 depends on S390 169 select CRYPTO_HASH 170 help 171 This is the s390 hardware accelerated implementation of the 172 SHA3_256 secure hash standard. 173 174 It is available as of z14. 175 176config CRYPTO_SHA3_512_S390 177 tristate "SHA3_384 and SHA3_512 digest algorithm" 178 depends on S390 179 select CRYPTO_HASH 180 help 181 This is the s390 hardware accelerated implementation of the 182 SHA3_512 secure hash standard. 183 184 It is available as of z14. 185 186config CRYPTO_DES_S390 187 tristate "DES and Triple DES cipher algorithms" 188 depends on S390 189 select CRYPTO_ALGAPI 190 select CRYPTO_SKCIPHER 191 select CRYPTO_LIB_DES 192 help 193 This is the s390 hardware accelerated implementation of the 194 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3). 195 196 As of z990 the ECB and CBC mode are hardware accelerated. 197 As of z196 the CTR mode is hardware accelerated. 198 199config CRYPTO_AES_S390 200 tristate "AES cipher algorithms" 201 depends on S390 202 select CRYPTO_ALGAPI 203 select CRYPTO_SKCIPHER 204 help 205 This is the s390 hardware accelerated implementation of the 206 AES cipher algorithms (FIPS-197). 207 208 As of z9 the ECB and CBC modes are hardware accelerated 209 for 128 bit keys. 210 As of z10 the ECB and CBC modes are hardware accelerated 211 for all AES key sizes. 212 As of z196 the CTR mode is hardware accelerated for all AES 213 key sizes and XTS mode is hardware accelerated for 256 and 214 512 bit keys. 215 216config S390_PRNG 217 tristate "Pseudo random number generator device driver" 218 depends on S390 219 default "m" 220 help 221 Select this option if you want to use the s390 pseudo random number 222 generator. The PRNG is part of the cryptographic processor functions 223 and uses triple-DES to generate secure random numbers like the 224 ANSI X9.17 standard. User-space programs access the 225 pseudo-random-number device through the char device /dev/prandom. 226 227 It is available as of z9. 228 229config CRYPTO_GHASH_S390 230 tristate "GHASH hash function" 231 depends on S390 232 select CRYPTO_HASH 233 help 234 This is the s390 hardware accelerated implementation of GHASH, 235 the hash function used in GCM (Galois/Counter mode). 236 237 It is available as of z196. 238 239config CRYPTO_CRC32_S390 240 tristate "CRC-32 algorithms" 241 depends on S390 242 select CRYPTO_HASH 243 select CRC32 244 help 245 Select this option if you want to use hardware accelerated 246 implementations of CRC algorithms. With this option, you 247 can optimize the computation of CRC-32 (IEEE 802.3 Ethernet) 248 and CRC-32C (Castagnoli). 249 250 It is available with IBM z13 or later. 251 252config CRYPTO_DEV_NIAGARA2 253 tristate "Niagara2 Stream Processing Unit driver" 254 select CRYPTO_LIB_DES 255 select CRYPTO_SKCIPHER 256 select CRYPTO_HASH 257 select CRYPTO_MD5 258 select CRYPTO_SHA1 259 select CRYPTO_SHA256 260 depends on SPARC64 261 help 262 Each core of a Niagara2 processor contains a Stream 263 Processing Unit, which itself contains several cryptographic 264 sub-units. One set provides the Modular Arithmetic Unit, 265 used for SSL offload. The other set provides the Cipher 266 Group, which can perform encryption, decryption, hashing, 267 checksumming, and raw copies. 268 269config CRYPTO_DEV_HIFN_795X 270 tristate "Driver HIFN 795x crypto accelerator chips" 271 select CRYPTO_LIB_DES 272 select CRYPTO_SKCIPHER 273 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG 274 depends on PCI 275 depends on !ARCH_DMA_ADDR_T_64BIT 276 help 277 This option allows you to have support for HIFN 795x crypto adapters. 278 279config CRYPTO_DEV_HIFN_795X_RNG 280 bool "HIFN 795x random number generator" 281 depends on CRYPTO_DEV_HIFN_795X 282 help 283 Select this option if you want to enable the random number generator 284 on the HIFN 795x crypto adapters. 285 286source "drivers/crypto/caam/Kconfig" 287 288config CRYPTO_DEV_TALITOS 289 tristate "Talitos Freescale Security Engine (SEC)" 290 select CRYPTO_AEAD 291 select CRYPTO_AUTHENC 292 select CRYPTO_SKCIPHER 293 select CRYPTO_HASH 294 select CRYPTO_LIB_DES 295 select HW_RANDOM 296 depends on FSL_SOC 297 help 298 Say 'Y' here to use the Freescale Security Engine (SEC) 299 to offload cryptographic algorithm computation. 300 301 The Freescale SEC is present on PowerQUICC 'E' processors, such 302 as the MPC8349E and MPC8548E. 303 304 To compile this driver as a module, choose M here: the module 305 will be called talitos. 306 307config CRYPTO_DEV_TALITOS1 308 bool "SEC1 (SEC 1.0 and SEC Lite 1.2)" 309 depends on CRYPTO_DEV_TALITOS 310 depends on PPC_8xx || PPC_82xx 311 default y 312 help 313 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0 314 found on MPC82xx or the Freescale Security Engine (SEC Lite) 315 version 1.2 found on MPC8xx 316 317config CRYPTO_DEV_TALITOS2 318 bool "SEC2+ (SEC version 2.0 or upper)" 319 depends on CRYPTO_DEV_TALITOS 320 default y if !PPC_8xx 321 help 322 Say 'Y' here to use the Freescale Security Engine (SEC) 323 version 2 and following as found on MPC83xx, MPC85xx, etc ... 324 325config CRYPTO_DEV_IXP4XX 326 tristate "Driver for IXP4xx crypto hardware acceleration" 327 depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE 328 select CRYPTO_LIB_DES 329 select CRYPTO_AEAD 330 select CRYPTO_AUTHENC 331 select CRYPTO_SKCIPHER 332 help 333 Driver for the IXP4xx NPE crypto engine. 334 335config CRYPTO_DEV_PPC4XX 336 tristate "Driver AMCC PPC4xx crypto accelerator" 337 depends on PPC && 4xx 338 select CRYPTO_HASH 339 select CRYPTO_AEAD 340 select CRYPTO_AES 341 select CRYPTO_LIB_AES 342 select CRYPTO_CCM 343 select CRYPTO_CTR 344 select CRYPTO_GCM 345 select CRYPTO_SKCIPHER 346 help 347 This option allows you to have support for AMCC crypto acceleration. 348 349config HW_RANDOM_PPC4XX 350 bool "PowerPC 4xx generic true random number generator support" 351 depends on CRYPTO_DEV_PPC4XX && HW_RANDOM 352 default y 353 help 354 This option provides the kernel-side support for the TRNG hardware 355 found in the security function of some PowerPC 4xx SoCs. 356 357config CRYPTO_DEV_OMAP 358 tristate "Support for OMAP crypto HW accelerators" 359 depends on ARCH_OMAP2PLUS 360 help 361 OMAP processors have various crypto HW accelerators. Select this if 362 you want to use the OMAP modules for any of the crypto algorithms. 363 364if CRYPTO_DEV_OMAP 365 366config CRYPTO_DEV_OMAP_SHAM 367 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator" 368 depends on ARCH_OMAP2PLUS 369 select CRYPTO_ENGINE 370 select CRYPTO_SHA1 371 select CRYPTO_MD5 372 select CRYPTO_SHA256 373 select CRYPTO_SHA512 374 select CRYPTO_HMAC 375 help 376 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you 377 want to use the OMAP module for MD5/SHA1/SHA2 algorithms. 378 379config CRYPTO_DEV_OMAP_AES 380 tristate "Support for OMAP AES hw engine" 381 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS 382 select CRYPTO_AES 383 select CRYPTO_SKCIPHER 384 select CRYPTO_ENGINE 385 select CRYPTO_CBC 386 select CRYPTO_ECB 387 select CRYPTO_CTR 388 select CRYPTO_AEAD 389 help 390 OMAP processors have AES module accelerator. Select this if you 391 want to use the OMAP module for AES algorithms. 392 393config CRYPTO_DEV_OMAP_DES 394 tristate "Support for OMAP DES/3DES hw engine" 395 depends on ARCH_OMAP2PLUS 396 select CRYPTO_LIB_DES 397 select CRYPTO_SKCIPHER 398 select CRYPTO_ENGINE 399 help 400 OMAP processors have DES/3DES module accelerator. Select this if you 401 want to use the OMAP module for DES and 3DES algorithms. Currently 402 the ECB and CBC modes of operation are supported by the driver. Also 403 accesses made on unaligned boundaries are supported. 404 405endif # CRYPTO_DEV_OMAP 406 407config CRYPTO_DEV_PICOXCELL 408 tristate "Support for picoXcell IPSEC and Layer2 crypto engines" 409 depends on (ARCH_PICOXCELL || COMPILE_TEST) && HAVE_CLK 410 select CRYPTO_AEAD 411 select CRYPTO_AES 412 select CRYPTO_AUTHENC 413 select CRYPTO_SKCIPHER 414 select CRYPTO_LIB_DES 415 select CRYPTO_CBC 416 select CRYPTO_ECB 417 select CRYPTO_SEQIV 418 help 419 This option enables support for the hardware offload engines in the 420 Picochip picoXcell SoC devices. Select this for IPSEC ESP offload 421 and for 3gpp Layer 2 ciphering support. 422 423 Saying m here will build a module named picoxcell_crypto. 424 425config CRYPTO_DEV_SAHARA 426 tristate "Support for SAHARA crypto accelerator" 427 depends on ARCH_MXC && OF 428 select CRYPTO_SKCIPHER 429 select CRYPTO_AES 430 select CRYPTO_ECB 431 help 432 This option enables support for the SAHARA HW crypto accelerator 433 found in some Freescale i.MX chips. 434 435config CRYPTO_DEV_EXYNOS_RNG 436 tristate "Exynos HW pseudo random number generator support" 437 depends on ARCH_EXYNOS || COMPILE_TEST 438 depends on HAS_IOMEM 439 select CRYPTO_RNG 440 help 441 This driver provides kernel-side support through the 442 cryptographic API for the pseudo random number generator hardware 443 found on Exynos SoCs. 444 445 To compile this driver as a module, choose M here: the 446 module will be called exynos-rng. 447 448 If unsure, say Y. 449 450config CRYPTO_DEV_S5P 451 tristate "Support for Samsung S5PV210/Exynos crypto accelerator" 452 depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST 453 depends on HAS_IOMEM 454 select CRYPTO_AES 455 select CRYPTO_SKCIPHER 456 help 457 This option allows you to have support for S5P crypto acceleration. 458 Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES 459 algorithms execution. 460 461config CRYPTO_DEV_EXYNOS_HASH 462 bool "Support for Samsung Exynos HASH accelerator" 463 depends on CRYPTO_DEV_S5P 464 depends on !CRYPTO_DEV_EXYNOS_RNG && CRYPTO_DEV_EXYNOS_RNG!=m 465 select CRYPTO_SHA1 466 select CRYPTO_MD5 467 select CRYPTO_SHA256 468 help 469 Select this to offload Exynos from HASH MD5/SHA1/SHA256. 470 This will select software SHA1, MD5 and SHA256 as they are 471 needed for small and zero-size messages. 472 HASH algorithms will be disabled if EXYNOS_RNG 473 is enabled due to hw conflict. 474 475config CRYPTO_DEV_NX 476 bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration" 477 depends on PPC64 478 help 479 This enables support for the NX hardware cryptographic accelerator 480 coprocessor that is in IBM PowerPC P7+ or later processors. This 481 does not actually enable any drivers, it only allows you to select 482 which acceleration type (encryption and/or compression) to enable. 483 484if CRYPTO_DEV_NX 485 source "drivers/crypto/nx/Kconfig" 486endif 487 488config CRYPTO_DEV_UX500 489 tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration" 490 depends on ARCH_U8500 491 help 492 Driver for ST-Ericsson UX500 crypto engine. 493 494if CRYPTO_DEV_UX500 495 source "drivers/crypto/ux500/Kconfig" 496endif # if CRYPTO_DEV_UX500 497 498config CRYPTO_DEV_ATMEL_AUTHENC 499 bool "Support for Atmel IPSEC/SSL hw accelerator" 500 depends on ARCH_AT91 || COMPILE_TEST 501 depends on CRYPTO_DEV_ATMEL_AES 502 help 503 Some Atmel processors can combine the AES and SHA hw accelerators 504 to enhance support of IPSEC/SSL. 505 Select this if you want to use the Atmel modules for 506 authenc(hmac(shaX),Y(cbc)) algorithms. 507 508config CRYPTO_DEV_ATMEL_AES 509 tristate "Support for Atmel AES hw accelerator" 510 depends on ARCH_AT91 || COMPILE_TEST 511 select CRYPTO_AES 512 select CRYPTO_AEAD 513 select CRYPTO_SKCIPHER 514 select CRYPTO_AUTHENC if CRYPTO_DEV_ATMEL_AUTHENC 515 select CRYPTO_DEV_ATMEL_SHA if CRYPTO_DEV_ATMEL_AUTHENC 516 help 517 Some Atmel processors have AES hw accelerator. 518 Select this if you want to use the Atmel module for 519 AES algorithms. 520 521 To compile this driver as a module, choose M here: the module 522 will be called atmel-aes. 523 524config CRYPTO_DEV_ATMEL_TDES 525 tristate "Support for Atmel DES/TDES hw accelerator" 526 depends on ARCH_AT91 || COMPILE_TEST 527 select CRYPTO_LIB_DES 528 select CRYPTO_SKCIPHER 529 help 530 Some Atmel processors have DES/TDES hw accelerator. 531 Select this if you want to use the Atmel module for 532 DES/TDES algorithms. 533 534 To compile this driver as a module, choose M here: the module 535 will be called atmel-tdes. 536 537config CRYPTO_DEV_ATMEL_SHA 538 tristate "Support for Atmel SHA hw accelerator" 539 depends on ARCH_AT91 || COMPILE_TEST 540 select CRYPTO_HASH 541 help 542 Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512 543 hw accelerator. 544 Select this if you want to use the Atmel module for 545 SHA1/SHA224/SHA256/SHA384/SHA512 algorithms. 546 547 To compile this driver as a module, choose M here: the module 548 will be called atmel-sha. 549 550config CRYPTO_DEV_ATMEL_I2C 551 tristate 552 select BITREVERSE 553 554config CRYPTO_DEV_ATMEL_ECC 555 tristate "Support for Microchip / Atmel ECC hw accelerator" 556 depends on I2C 557 select CRYPTO_DEV_ATMEL_I2C 558 select CRYPTO_ECDH 559 select CRC16 560 help 561 Microhip / Atmel ECC hw accelerator. 562 Select this if you want to use the Microchip / Atmel module for 563 ECDH algorithm. 564 565 To compile this driver as a module, choose M here: the module 566 will be called atmel-ecc. 567 568config CRYPTO_DEV_ATMEL_SHA204A 569 tristate "Support for Microchip / Atmel SHA accelerator and RNG" 570 depends on I2C 571 select CRYPTO_DEV_ATMEL_I2C 572 select HW_RANDOM 573 select CRC16 574 help 575 Microhip / Atmel SHA accelerator and RNG. 576 Select this if you want to use the Microchip / Atmel SHA204A 577 module as a random number generator. (Other functions of the 578 chip are currently not exposed by this driver) 579 580 To compile this driver as a module, choose M here: the module 581 will be called atmel-sha204a. 582 583config CRYPTO_DEV_CCP 584 bool "Support for AMD Secure Processor" 585 depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM 586 help 587 The AMD Secure Processor provides support for the Cryptographic Coprocessor 588 (CCP) and the Platform Security Processor (PSP) devices. 589 590if CRYPTO_DEV_CCP 591 source "drivers/crypto/ccp/Kconfig" 592endif 593 594config CRYPTO_DEV_MXS_DCP 595 tristate "Support for Freescale MXS DCP" 596 depends on (ARCH_MXS || ARCH_MXC) 597 select STMP_DEVICE 598 select CRYPTO_CBC 599 select CRYPTO_ECB 600 select CRYPTO_AES 601 select CRYPTO_SKCIPHER 602 select CRYPTO_HASH 603 help 604 The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB 605 co-processor on the die. 606 607 To compile this driver as a module, choose M here: the module 608 will be called mxs-dcp. 609 610source "drivers/crypto/qat/Kconfig" 611source "drivers/crypto/cavium/cpt/Kconfig" 612source "drivers/crypto/cavium/nitrox/Kconfig" 613source "drivers/crypto/marvell/Kconfig" 614 615config CRYPTO_DEV_CAVIUM_ZIP 616 tristate "Cavium ZIP driver" 617 depends on PCI && 64BIT && (ARM64 || COMPILE_TEST) 618 help 619 Select this option if you want to enable compression/decompression 620 acceleration on Cavium's ARM based SoCs 621 622config CRYPTO_DEV_QCE 623 tristate "Qualcomm crypto engine accelerator" 624 depends on ARCH_QCOM || COMPILE_TEST 625 depends on HAS_IOMEM 626 help 627 This driver supports Qualcomm crypto engine accelerator 628 hardware. To compile this driver as a module, choose M here. The 629 module will be called qcrypto. 630 631config CRYPTO_DEV_QCE_SKCIPHER 632 bool 633 depends on CRYPTO_DEV_QCE 634 select CRYPTO_AES 635 select CRYPTO_LIB_DES 636 select CRYPTO_ECB 637 select CRYPTO_CBC 638 select CRYPTO_XTS 639 select CRYPTO_CTR 640 select CRYPTO_SKCIPHER 641 642config CRYPTO_DEV_QCE_SHA 643 bool 644 depends on CRYPTO_DEV_QCE 645 select CRYPTO_SHA1 646 select CRYPTO_SHA256 647 648choice 649 prompt "Algorithms enabled for QCE acceleration" 650 default CRYPTO_DEV_QCE_ENABLE_ALL 651 depends on CRYPTO_DEV_QCE 652 help 653 This option allows to choose whether to build support for all algorihtms 654 (default), hashes-only, or skciphers-only. 655 656 The QCE engine does not appear to scale as well as the CPU to handle 657 multiple crypto requests. While the ipq40xx chips have 4-core CPUs, the 658 QCE handles only 2 requests in parallel. 659 660 Ipsec throughput seems to improve when disabling either family of 661 algorithms, sharing the load with the CPU. Enabling skciphers-only 662 appears to work best. 663 664 config CRYPTO_DEV_QCE_ENABLE_ALL 665 bool "All supported algorithms" 666 select CRYPTO_DEV_QCE_SKCIPHER 667 select CRYPTO_DEV_QCE_SHA 668 help 669 Enable all supported algorithms: 670 - AES (CBC, CTR, ECB, XTS) 671 - 3DES (CBC, ECB) 672 - DES (CBC, ECB) 673 - SHA1, HMAC-SHA1 674 - SHA256, HMAC-SHA256 675 676 config CRYPTO_DEV_QCE_ENABLE_SKCIPHER 677 bool "Symmetric-key ciphers only" 678 select CRYPTO_DEV_QCE_SKCIPHER 679 help 680 Enable symmetric-key ciphers only: 681 - AES (CBC, CTR, ECB, XTS) 682 - 3DES (ECB, CBC) 683 - DES (ECB, CBC) 684 685 config CRYPTO_DEV_QCE_ENABLE_SHA 686 bool "Hash/HMAC only" 687 select CRYPTO_DEV_QCE_SHA 688 help 689 Enable hashes/HMAC algorithms only: 690 - SHA1, HMAC-SHA1 691 - SHA256, HMAC-SHA256 692 693endchoice 694 695config CRYPTO_DEV_QCE_SW_MAX_LEN 696 int "Default maximum request size to use software for AES" 697 depends on CRYPTO_DEV_QCE && CRYPTO_DEV_QCE_SKCIPHER 698 default 512 699 help 700 This sets the default maximum request size to perform AES requests 701 using software instead of the crypto engine. It can be changed by 702 setting the aes_sw_max_len parameter. 703 704 Small blocks are processed faster in software than hardware. 705 Considering the 256-bit ciphers, software is 2-3 times faster than 706 qce at 256-bytes, 30% faster at 512, and about even at 768-bytes. 707 With 128-bit keys, the break-even point would be around 1024-bytes. 708 709 The default is set a little lower, to 512 bytes, to balance the 710 cost in CPU usage. The minimum recommended setting is 16-bytes 711 (1 AES block), since AES-GCM will fail if you set it lower. 712 Setting this to zero will send all requests to the hardware. 713 714 Note that 192-bit keys are not supported by the hardware and are 715 always processed by the software fallback, and all DES requests 716 are done by the hardware. 717 718config CRYPTO_DEV_QCOM_RNG 719 tristate "Qualcomm Random Number Generator Driver" 720 depends on ARCH_QCOM || COMPILE_TEST 721 select CRYPTO_RNG 722 help 723 This driver provides support for the Random Number 724 Generator hardware found on Qualcomm SoCs. 725 726 To compile this driver as a module, choose M here. The 727 module will be called qcom-rng. If unsure, say N. 728 729config CRYPTO_DEV_VMX 730 bool "Support for VMX cryptographic acceleration instructions" 731 depends on PPC64 && VSX 732 help 733 Support for VMX cryptographic acceleration instructions. 734 735source "drivers/crypto/vmx/Kconfig" 736 737config CRYPTO_DEV_IMGTEC_HASH 738 tristate "Imagination Technologies hardware hash accelerator" 739 depends on MIPS || COMPILE_TEST 740 select CRYPTO_MD5 741 select CRYPTO_SHA1 742 select CRYPTO_SHA256 743 select CRYPTO_HASH 744 help 745 This driver interfaces with the Imagination Technologies 746 hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256 747 hashing algorithms. 748 749config CRYPTO_DEV_ROCKCHIP 750 tristate "Rockchip's Cryptographic Engine driver" 751 depends on OF && ARCH_ROCKCHIP 752 depends on PM 753 select CRYPTO_ECB 754 select CRYPTO_CBC 755 select CRYPTO_DES 756 select CRYPTO_AES 757 select CRYPTO_ENGINE 758 select CRYPTO_LIB_DES 759 select CRYPTO_MD5 760 select CRYPTO_SHA1 761 select CRYPTO_SHA256 762 select CRYPTO_HASH 763 select CRYPTO_SKCIPHER 764 765 help 766 This driver interfaces with the hardware crypto accelerator. 767 Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode. 768 769config CRYPTO_DEV_ZYNQMP_AES 770 tristate "Support for Xilinx ZynqMP AES hw accelerator" 771 depends on ZYNQMP_FIRMWARE || COMPILE_TEST 772 select CRYPTO_AES 773 select CRYPTO_ENGINE 774 select CRYPTO_AEAD 775 help 776 Xilinx ZynqMP has AES-GCM engine used for symmetric key 777 encryption and decryption. This driver interfaces with AES hw 778 accelerator. Select this if you want to use the ZynqMP module 779 for AES algorithms. 780 781config CRYPTO_DEV_MEDIATEK 782 tristate "MediaTek's EIP97 Cryptographic Engine driver" 783 depends on (ARM && ARCH_MEDIATEK) || COMPILE_TEST 784 select CRYPTO_LIB_AES 785 select CRYPTO_AEAD 786 select CRYPTO_SKCIPHER 787 select CRYPTO_SHA1 788 select CRYPTO_SHA256 789 select CRYPTO_SHA512 790 select CRYPTO_HMAC 791 help 792 This driver allows you to utilize the hardware crypto accelerator 793 EIP97 which can be found on the MT7623 MT2701, MT8521p, etc .... 794 Select this if you want to use it for AES/SHA1/SHA2 algorithms. 795 796source "drivers/crypto/chelsio/Kconfig" 797 798source "drivers/crypto/virtio/Kconfig" 799 800config CRYPTO_DEV_BCM_SPU 801 tristate "Broadcom symmetric crypto/hash acceleration support" 802 depends on ARCH_BCM_IPROC 803 depends on MAILBOX 804 default m 805 select CRYPTO_AUTHENC 806 select CRYPTO_LIB_DES 807 select CRYPTO_MD5 808 select CRYPTO_SHA1 809 select CRYPTO_SHA256 810 select CRYPTO_SHA512 811 help 812 This driver provides support for Broadcom crypto acceleration using the 813 Secure Processing Unit (SPU). The SPU driver registers skcipher, 814 ahash, and aead algorithms with the kernel cryptographic API. 815 816source "drivers/crypto/stm32/Kconfig" 817 818config CRYPTO_DEV_SAFEXCEL 819 tristate "Inside Secure's SafeXcel cryptographic engine driver" 820 depends on (OF || PCI || COMPILE_TEST) && HAS_IOMEM 821 select CRYPTO_LIB_AES 822 select CRYPTO_AUTHENC 823 select CRYPTO_SKCIPHER 824 select CRYPTO_LIB_DES 825 select CRYPTO_HASH 826 select CRYPTO_HMAC 827 select CRYPTO_MD5 828 select CRYPTO_SHA1 829 select CRYPTO_SHA256 830 select CRYPTO_SHA512 831 select CRYPTO_CHACHA20POLY1305 832 select CRYPTO_SHA3 833 help 834 This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic 835 engines designed by Inside Secure. It currently accelerates DES, 3DES and 836 AES block ciphers in ECB and CBC mode, as well as SHA1, SHA224, SHA256, 837 SHA384 and SHA512 hash algorithms for both basic hash and HMAC. 838 Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations. 839 840config CRYPTO_DEV_ARTPEC6 841 tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration." 842 depends on ARM && (ARCH_ARTPEC || COMPILE_TEST) 843 depends on OF 844 select CRYPTO_AEAD 845 select CRYPTO_AES 846 select CRYPTO_ALGAPI 847 select CRYPTO_SKCIPHER 848 select CRYPTO_CTR 849 select CRYPTO_HASH 850 select CRYPTO_SHA1 851 select CRYPTO_SHA256 852 select CRYPTO_SHA512 853 help 854 Enables the driver for the on-chip crypto accelerator 855 of Axis ARTPEC SoCs. 856 857 To compile this driver as a module, choose M here. 858 859config CRYPTO_DEV_CCREE 860 tristate "Support for ARM TrustZone CryptoCell family of security processors" 861 depends on CRYPTO && CRYPTO_HW && OF && HAS_DMA 862 default n 863 select CRYPTO_HASH 864 select CRYPTO_SKCIPHER 865 select CRYPTO_LIB_DES 866 select CRYPTO_AEAD 867 select CRYPTO_AUTHENC 868 select CRYPTO_SHA1 869 select CRYPTO_MD5 870 select CRYPTO_SHA256 871 select CRYPTO_SHA512 872 select CRYPTO_HMAC 873 select CRYPTO_AES 874 select CRYPTO_CBC 875 select CRYPTO_ECB 876 select CRYPTO_CTR 877 select CRYPTO_XTS 878 select CRYPTO_SM4 879 select CRYPTO_SM3 880 help 881 Say 'Y' to enable a driver for the REE interface of the Arm 882 TrustZone CryptoCell family of processors. Currently the 883 CryptoCell 713, 703, 712, 710 and 630 are supported. 884 Choose this if you wish to use hardware acceleration of 885 cryptographic operations on the system REE. 886 If unsure say Y. 887 888source "drivers/crypto/hisilicon/Kconfig" 889 890source "drivers/crypto/amlogic/Kconfig" 891 892config CRYPTO_DEV_SA2UL 893 tristate "Support for TI security accelerator" 894 depends on ARCH_K3 || COMPILE_TEST 895 select ARM64_CRYPTO 896 select CRYPTO_AES 897 select CRYPTO_AES_ARM64 898 select CRYPTO_ALGAPI 899 select CRYPTO_AUTHENC 900 select CRYPTO_DES 901 select CRYPTO_SHA1 902 select CRYPTO_SHA256 903 select CRYPTO_SHA512 904 select HW_RANDOM 905 select SG_SPLIT 906 help 907 K3 devices include a security accelerator engine that may be 908 used for crypto offload. Select this if you want to use hardware 909 acceleration for cryptographic algorithms on these devices. 910 911endif # CRYPTO_HW 912