Searched defs:Mode (Results 1 – 9 of 9) sorted by relevance
| /drivers/scsi/aic94xx/ |
| D | aic94xx_reg_def.h | 502 #define CSEQm_CIO_REG(Mode, Reg) \ argument
552 #define CMnSCBPTR(Mode) CSEQm_CIO_REG(Mode, MnSCBPTR) argument
554 #define CMnDDBPTR(Mode) CSEQm_CIO_REG(Mode, MnDDBPTR) argument
556 #define CMnSCRATCHPAGE(Mode) CSEQm_CIO_REG(Mode, MnSCRATCHPAGE) argument
564 #define CMnREQMBX(Mode) CSEQm_CIO_REG(Mode, 0x30) argument
571 #define CMnRSPMBX(Mode) CSEQm_CIO_REG(Mode, 0x34) argument
593 #define CMnINT(Mode) CSEQm_CIO_REG(Mode, 0x38) argument
604 #define CMnINTEN(Mode) CSEQm_CIO_REG(Mode, 0x3C) argument
663 #define CMnSCRATCH(Mode) CSEQm_CIO_REG(Mode, 0x1E0) argument
832 #define LmSEQ_PHY_BASE(Mode, LinkNum) \ argument
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| /drivers/staging/rtl8188eu/include/ |
| D | rtl8188e_cmd.h | 49 u8 Mode;/* 0:Active,1:LPS,2:WMMPS */ member
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| /drivers/staging/rtl8188eu/hal/ |
| D | rtl8188e_cmd.c | 143 void rtl8188e_set_FwPwrMode_cmd(struct adapter *adapt, u8 Mode) in rtl8188e_set_FwPwrMode_cmd()
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| /drivers/scsi/ |
| D | hpsa_cmd.h | 307 u8 Mode:2; /* b00 */ member
312 u8 Mode:2; /* b01 */ member
318 u8 Mode:2; /* b10 */ member
325 u32 Mode:2; member
332 u32 Mode:2; member
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| /drivers/media/tuners/ |
| D | mxl5005s.c | 243 u8 Mode; /* 0: Analog Mode ; 1: Digital Mode */ member
1672 u8 Mode, /* 0: Analog Mode ; 1: Digital Mode */ in MXL5005_TunerConfig()
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| D | mt2063.c | 1174 enum mt2063_delivery_sys Mode) in MT2063_SetReceiverMode()
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| /drivers/media/pci/ngene/ |
| D | ngene.h | 336 u8 Mode; /* Controls clock source */ member
564 u8 Mode; member
668 u8 Mode; member
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| /drivers/net/hippi/ |
| D | rrunner.h | 132 u32 Mode; member
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| /drivers/gpu/drm/amd/display/dc/dml/ |
| D | display_mode_vba.h | 459 unsigned int Mode; member
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