| /drivers/net/ethernet/freescale/fs_enet/ |
| D | mii-fec.c | 46 #define mk_mii_read(REG) (0x60020000 | ((REG & 0x1f) << 18)) argument
47 #define mk_mii_write(REG, VAL) (0x50020000 | ((REG & 0x1f) << 18) | (VAL & 0xffff)) argument
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| /drivers/scsi/ |
| D | sun3x_esp.c | 48 #define dma_read32(REG) \ argument
50 #define dma_write32(VAL, REG) \ argument
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| D | mac_esp.c | 49 #define esp_read8(REG) mac_esp_read8(esp, REG) argument
50 #define esp_write8(VAL, REG) mac_esp_write8(esp, VAL, REG) argument
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| D | sun_esp.c | 31 #define dma_read32(REG) \ argument
33 #define dma_write32(VAL, REG) \ argument
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| /drivers/gpu/drm/amd/display/dc/dcn21/ |
| D | dcn21_hubbub.c | 31 #define REG(reg)\ macro
42 #define REG(reg)\ macro
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/ |
| D | rv1_clk_mgr_clk.c | 47 #define REG(reg_name) \ macro
|
| /drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_hubbub.c | 31 #define REG(reg)\ macro
41 #define REG(reg)\ macro
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| D | dcn20_vmid.c | 31 #define REG(reg)\ macro
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| /drivers/regulator/ |
| D | rn5t618-regulator.c | 25 #define REG(rid, ereg, emask, vreg, vmask, min, max, step) \ macro
|
| /drivers/gpu/drm/amd/display/dc/bios/ |
| D | bios_parser_helper.c | 50 #define REG(reg)\ macro
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| /drivers/gpu/drm/amd/display/dc/gpio/dce120/ |
| D | hw_translate_dce120.c | 51 #define REG(reg_name)\ macro
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| /drivers/gpu/drm/amd/display/dc/gpio/dcn10/ |
| D | hw_translate_dcn10.c | 51 #define REG(reg_name)\ macro
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| /drivers/gpu/drm/amd/display/dc/dcn30/ |
| D | dcn30_vpg.c | 34 #define REG(reg)\ macro
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| D | dcn30_dccg.c | 33 #define REG(reg) \ macro
|
| D | dcn30_mmhubbub.c | 33 #define REG(reg)\ macro
|
| /drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_ipp.c | 32 #define REG(reg) \ macro
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| D | dcn10_dwb.c | 34 #define REG(reg)\ macro
|
| /drivers/gpu/drm/amd/display/dc/gpio/dcn21/ |
| D | hw_translate_dcn21.c | 55 #define REG(reg_name)\ macro
|
| /drivers/gpu/drm/amd/display/dc/gpio/dcn30/ |
| D | hw_translate_dcn30.c | 61 #define REG(reg_name)\ macro
|
| /drivers/gpu/drm/amd/display/dc/gpio/dcn20/ |
| D | hw_translate_dcn20.c | 55 #define REG(reg_name)\ macro
|
| /drivers/gpu/drm/amd/display/dc/dce120/ |
| D | dce120_hw_sequencer.c | 42 #define REG(reg)\ macro
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| /drivers/gpu/drm/amd/display/dc/gpio/ |
| D | hw_generic.c | 44 #define REG(reg)\ macro
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| /drivers/gpu/drm/amd/display/dc/gpio/dce60/ |
| D | hw_factory_dce60.c | 41 #define REG(reg_name)\ macro
|
| /drivers/gpu/drm/amd/display/dc/gpio/dce80/ |
| D | hw_factory_dce80.c | 41 #define REG(reg_name)\ macro
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dce60/ |
| D | dce60_clk_mgr.c | 46 #define REG(reg) \ macro
|