| /drivers/clk/actions/ |
| D | owl-gate.h | 27 #define OWL_GATE_HW(_reg, _bit_idx, _gate_flags) \ argument
35 _bit_idx, _gate_flags, _flags) \ argument
48 _bit_idx, _gate_flags, _flags) \ argument
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| D | owl-pll.h | 41 #define OWL_PLL_HW(_reg, _bfreq, _bit_idx, _shift, \ argument
55 #define OWL_PLL(_struct, _name, _parent, _reg, _bfreq, _bit_idx, \ argument
70 #define OWL_PLL_NO_PARENT(_struct, _name, _reg, _bfreq, _bit_idx, \ argument
84 #define OWL_PLL_NO_PARENT_DELAY(_struct, _name, _reg, _bfreq, _bit_idx, \ argument
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| /drivers/clk/ |
| D | clk-stm32h7.c | 598 #define OSC_CLKF(_name, _parent, _gate_offset, _bit_idx, _bit_rdy, _flags)\ argument
608 #define OSC_CLK(_name, _parent, _gate_offset, _bit_idx, _bit_rdy)\ argument
938 #define M_ODF_F(_name, _parent, _gate_offset, _bit_idx, _rate_offset,\ argument
950 #define M_ODF(_name, _parent, _gate_offset, _bit_idx, _rate_offset,\ argument
986 #define PER_CLKF(_gate_offset, _bit_idx, _name, _parent, _flags)\ argument
995 #define PER_CLK(_gate_offset, _bit_idx, _name, _parent)\ argument
1064 #define KER_CLKF(_gate_offset, _bit_idx,\ argument
1077 #define KER_CLK(_gate_offset, _bit_idx, _mux_offset, _mux_shift, _mux_width,\ argument
1082 #define KER_CLKF_NOMUX(_gate_offset, _bit_idx,\ argument
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| D | clk-stm32mp1.c | 1092 #define GATE(_id, _name, _parent, _flags, _offset, _bit_idx, _gate_flags)\ argument
1181 #define STM32_TIM(_id, _name, _parent, _offset_set, _bit_idx)\ argument
1221 #define GATE_MP1(_id, _name, _parent, _flags, _offset, _bit_idx, _gate_flags)\ argument
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| /drivers/clk/keystone/ |
| D | syscon-clk.c | 135 #define TI_SYSCON_CLK_GATE(_name, _offset, _bit_idx) \ argument
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