1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Atlantic Network Driver
3 *
4 * Copyright (C) 2014-2019 aQuantia Corporation
5 * Copyright (C) 2019-2020 Marvell International Ltd.
6 */
7
8 /* File aq_nic.c: Definition of common code for NIC. */
9
10 #include "aq_nic.h"
11 #include "aq_ring.h"
12 #include "aq_vec.h"
13 #include "aq_hw.h"
14 #include "aq_pci_func.h"
15 #include "aq_macsec.h"
16 #include "aq_main.h"
17 #include "aq_phy.h"
18 #include "aq_ptp.h"
19 #include "aq_filters.h"
20
21 #include <linux/moduleparam.h>
22 #include <linux/netdevice.h>
23 #include <linux/etherdevice.h>
24 #include <linux/timer.h>
25 #include <linux/cpu.h>
26 #include <linux/ip.h>
27 #include <linux/tcp.h>
28 #include <net/ip.h>
29 #include <net/pkt_cls.h>
30
31 static unsigned int aq_itr = AQ_CFG_INTERRUPT_MODERATION_AUTO;
32 module_param_named(aq_itr, aq_itr, uint, 0644);
33 MODULE_PARM_DESC(aq_itr, "Interrupt throttling mode");
34
35 static unsigned int aq_itr_tx;
36 module_param_named(aq_itr_tx, aq_itr_tx, uint, 0644);
37 MODULE_PARM_DESC(aq_itr_tx, "TX interrupt throttle rate");
38
39 static unsigned int aq_itr_rx;
40 module_param_named(aq_itr_rx, aq_itr_rx, uint, 0644);
41 MODULE_PARM_DESC(aq_itr_rx, "RX interrupt throttle rate");
42
43 static void aq_nic_update_ndev_stats(struct aq_nic_s *self);
44
aq_nic_rss_init(struct aq_nic_s * self,unsigned int num_rss_queues)45 static void aq_nic_rss_init(struct aq_nic_s *self, unsigned int num_rss_queues)
46 {
47 static u8 rss_key[AQ_CFG_RSS_HASHKEY_SIZE] = {
48 0x1e, 0xad, 0x71, 0x87, 0x65, 0xfc, 0x26, 0x7d,
49 0x0d, 0x45, 0x67, 0x74, 0xcd, 0x06, 0x1a, 0x18,
50 0xb6, 0xc1, 0xf0, 0xc7, 0xbb, 0x18, 0xbe, 0xf8,
51 0x19, 0x13, 0x4b, 0xa9, 0xd0, 0x3e, 0xfe, 0x70,
52 0x25, 0x03, 0xab, 0x50, 0x6a, 0x8b, 0x82, 0x0c
53 };
54 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
55 struct aq_rss_parameters *rss_params;
56 int i = 0;
57
58 rss_params = &cfg->aq_rss;
59
60 rss_params->hash_secret_key_size = sizeof(rss_key);
61 memcpy(rss_params->hash_secret_key, rss_key, sizeof(rss_key));
62 rss_params->indirection_table_size = AQ_CFG_RSS_INDIRECTION_TABLE_MAX;
63
64 for (i = rss_params->indirection_table_size; i--;)
65 rss_params->indirection_table[i] = i & (num_rss_queues - 1);
66 }
67
68 /* Recalculate the number of vectors */
aq_nic_cfg_update_num_vecs(struct aq_nic_s * self)69 static void aq_nic_cfg_update_num_vecs(struct aq_nic_s *self)
70 {
71 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
72
73 cfg->vecs = min(cfg->aq_hw_caps->vecs, AQ_CFG_VECS_DEF);
74 cfg->vecs = min(cfg->vecs, num_online_cpus());
75 if (self->irqvecs > AQ_HW_SERVICE_IRQS)
76 cfg->vecs = min(cfg->vecs, self->irqvecs - AQ_HW_SERVICE_IRQS);
77 /* cfg->vecs should be power of 2 for RSS */
78 cfg->vecs = rounddown_pow_of_two(cfg->vecs);
79
80 if (ATL_HW_IS_CHIP_FEATURE(self->aq_hw, ANTIGUA)) {
81 if (cfg->tcs > 2)
82 cfg->vecs = min(cfg->vecs, 4U);
83 }
84
85 if (cfg->vecs <= 4)
86 cfg->tc_mode = AQ_TC_MODE_8TCS;
87 else
88 cfg->tc_mode = AQ_TC_MODE_4TCS;
89
90 /*rss rings */
91 cfg->num_rss_queues = min(cfg->vecs, AQ_CFG_NUM_RSS_QUEUES_DEF);
92 aq_nic_rss_init(self, cfg->num_rss_queues);
93 }
94
95 /* Checks hw_caps and 'corrects' aq_nic_cfg in runtime */
aq_nic_cfg_start(struct aq_nic_s * self)96 void aq_nic_cfg_start(struct aq_nic_s *self)
97 {
98 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
99 int i;
100
101 cfg->tcs = AQ_CFG_TCS_DEF;
102
103 cfg->is_polling = AQ_CFG_IS_POLLING_DEF;
104
105 cfg->itr = aq_itr;
106 cfg->tx_itr = aq_itr_tx;
107 cfg->rx_itr = aq_itr_rx;
108
109 cfg->rxpageorder = AQ_CFG_RX_PAGEORDER;
110 cfg->is_rss = AQ_CFG_IS_RSS_DEF;
111 cfg->aq_rss.base_cpu_number = AQ_CFG_RSS_BASE_CPU_NUM_DEF;
112 cfg->fc.req = AQ_CFG_FC_MODE;
113 cfg->wol = AQ_CFG_WOL_MODES;
114
115 cfg->mtu = AQ_CFG_MTU_DEF;
116 cfg->link_speed_msk = AQ_CFG_SPEED_MSK;
117 cfg->is_autoneg = AQ_CFG_IS_AUTONEG_DEF;
118
119 cfg->is_lro = AQ_CFG_IS_LRO_DEF;
120 cfg->is_ptp = true;
121
122 /*descriptors */
123 cfg->rxds = min(cfg->aq_hw_caps->rxds_max, AQ_CFG_RXDS_DEF);
124 cfg->txds = min(cfg->aq_hw_caps->txds_max, AQ_CFG_TXDS_DEF);
125
126 aq_nic_cfg_update_num_vecs(self);
127
128 cfg->irq_type = aq_pci_func_get_irq_type(self);
129
130 if ((cfg->irq_type == AQ_HW_IRQ_LEGACY) ||
131 (cfg->aq_hw_caps->vecs == 1U) ||
132 (cfg->vecs == 1U)) {
133 cfg->is_rss = 0U;
134 cfg->vecs = 1U;
135 }
136
137 /* Check if we have enough vectors allocated for
138 * link status IRQ. If no - we'll know link state from
139 * slower service task.
140 */
141 if (AQ_HW_SERVICE_IRQS > 0 && cfg->vecs + 1 <= self->irqvecs)
142 cfg->link_irq_vec = cfg->vecs;
143 else
144 cfg->link_irq_vec = 0;
145
146 cfg->link_speed_msk &= cfg->aq_hw_caps->link_speed_msk;
147 cfg->features = cfg->aq_hw_caps->hw_features;
148 cfg->is_vlan_rx_strip = !!(cfg->features & NETIF_F_HW_VLAN_CTAG_RX);
149 cfg->is_vlan_tx_insert = !!(cfg->features & NETIF_F_HW_VLAN_CTAG_TX);
150 cfg->is_vlan_force_promisc = true;
151
152 for (i = 0; i < sizeof(cfg->prio_tc_map); i++)
153 cfg->prio_tc_map[i] = cfg->tcs * i / 8;
154 }
155
aq_nic_update_link_status(struct aq_nic_s * self)156 static int aq_nic_update_link_status(struct aq_nic_s *self)
157 {
158 int err = self->aq_fw_ops->update_link_status(self->aq_hw);
159 u32 fc = 0;
160
161 if (err)
162 return err;
163
164 if (self->aq_fw_ops->get_flow_control)
165 self->aq_fw_ops->get_flow_control(self->aq_hw, &fc);
166 self->aq_nic_cfg.fc.cur = fc;
167
168 if (self->link_status.mbps != self->aq_hw->aq_link_status.mbps) {
169 netdev_info(self->ndev, "%s: link change old %d new %d\n",
170 AQ_CFG_DRV_NAME, self->link_status.mbps,
171 self->aq_hw->aq_link_status.mbps);
172 aq_nic_update_interrupt_moderation_settings(self);
173
174 if (self->aq_ptp) {
175 aq_ptp_clock_init(self);
176 aq_ptp_tm_offset_set(self,
177 self->aq_hw->aq_link_status.mbps);
178 aq_ptp_link_change(self);
179 }
180
181 /* Driver has to update flow control settings on RX block
182 * on any link event.
183 * We should query FW whether it negotiated FC.
184 */
185 if (self->aq_hw_ops->hw_set_fc)
186 self->aq_hw_ops->hw_set_fc(self->aq_hw, fc, 0);
187 }
188
189 self->link_status = self->aq_hw->aq_link_status;
190 if (!netif_carrier_ok(self->ndev) && self->link_status.mbps) {
191 aq_utils_obj_set(&self->flags,
192 AQ_NIC_FLAG_STARTED);
193 aq_utils_obj_clear(&self->flags,
194 AQ_NIC_LINK_DOWN);
195 netif_carrier_on(self->ndev);
196 #if IS_ENABLED(CONFIG_MACSEC)
197 aq_macsec_enable(self);
198 #endif
199 if (self->aq_hw_ops->hw_tc_rate_limit_set)
200 self->aq_hw_ops->hw_tc_rate_limit_set(self->aq_hw);
201
202 netif_tx_wake_all_queues(self->ndev);
203 }
204 if (netif_carrier_ok(self->ndev) && !self->link_status.mbps) {
205 netif_carrier_off(self->ndev);
206 netif_tx_disable(self->ndev);
207 aq_utils_obj_set(&self->flags, AQ_NIC_LINK_DOWN);
208 }
209
210 return 0;
211 }
212
aq_linkstate_threaded_isr(int irq,void * private)213 static irqreturn_t aq_linkstate_threaded_isr(int irq, void *private)
214 {
215 struct aq_nic_s *self = private;
216
217 if (!self)
218 return IRQ_NONE;
219
220 aq_nic_update_link_status(self);
221
222 self->aq_hw_ops->hw_irq_enable(self->aq_hw,
223 BIT(self->aq_nic_cfg.link_irq_vec));
224
225 return IRQ_HANDLED;
226 }
227
aq_nic_service_task(struct work_struct * work)228 static void aq_nic_service_task(struct work_struct *work)
229 {
230 struct aq_nic_s *self = container_of(work, struct aq_nic_s,
231 service_task);
232 int err;
233
234 aq_ptp_service_task(self);
235
236 if (aq_utils_obj_test(&self->flags, AQ_NIC_FLAGS_IS_NOT_READY))
237 return;
238
239 err = aq_nic_update_link_status(self);
240 if (err)
241 return;
242
243 #if IS_ENABLED(CONFIG_MACSEC)
244 aq_macsec_work(self);
245 #endif
246
247 mutex_lock(&self->fwreq_mutex);
248 if (self->aq_fw_ops->update_stats)
249 self->aq_fw_ops->update_stats(self->aq_hw);
250 mutex_unlock(&self->fwreq_mutex);
251
252 aq_nic_update_ndev_stats(self);
253 }
254
aq_nic_service_timer_cb(struct timer_list * t)255 static void aq_nic_service_timer_cb(struct timer_list *t)
256 {
257 struct aq_nic_s *self = from_timer(self, t, service_timer);
258
259 mod_timer(&self->service_timer,
260 jiffies + AQ_CFG_SERVICE_TIMER_INTERVAL);
261
262 aq_ndev_schedule_work(&self->service_task);
263 }
264
aq_nic_polling_timer_cb(struct timer_list * t)265 static void aq_nic_polling_timer_cb(struct timer_list *t)
266 {
267 struct aq_nic_s *self = from_timer(self, t, polling_timer);
268 unsigned int i = 0U;
269
270 for (i = 0U; self->aq_vecs > i; ++i)
271 aq_vec_isr(i, (void *)self->aq_vec[i]);
272
273 mod_timer(&self->polling_timer, jiffies +
274 AQ_CFG_POLLING_TIMER_INTERVAL);
275 }
276
aq_nic_hw_prepare(struct aq_nic_s * self)277 static int aq_nic_hw_prepare(struct aq_nic_s *self)
278 {
279 int err = 0;
280
281 err = self->aq_hw_ops->hw_soft_reset(self->aq_hw);
282 if (err)
283 goto exit;
284
285 err = self->aq_hw_ops->hw_prepare(self->aq_hw, &self->aq_fw_ops);
286
287 exit:
288 return err;
289 }
290
aq_nic_is_valid_ether_addr(const u8 * addr)291 static bool aq_nic_is_valid_ether_addr(const u8 *addr)
292 {
293 /* Some engineering samples of Aquantia NICs are provisioned with a
294 * partially populated MAC, which is still invalid.
295 */
296 return !(addr[0] == 0 && addr[1] == 0 && addr[2] == 0);
297 }
298
aq_nic_ndev_register(struct aq_nic_s * self)299 int aq_nic_ndev_register(struct aq_nic_s *self)
300 {
301 int err = 0;
302
303 if (!self->ndev) {
304 err = -EINVAL;
305 goto err_exit;
306 }
307
308 err = aq_nic_hw_prepare(self);
309 if (err)
310 goto err_exit;
311
312 #if IS_ENABLED(CONFIG_MACSEC)
313 aq_macsec_init(self);
314 #endif
315
316 mutex_lock(&self->fwreq_mutex);
317 err = self->aq_fw_ops->get_mac_permanent(self->aq_hw,
318 self->ndev->dev_addr);
319 mutex_unlock(&self->fwreq_mutex);
320 if (err)
321 goto err_exit;
322
323 if (!is_valid_ether_addr(self->ndev->dev_addr) ||
324 !aq_nic_is_valid_ether_addr(self->ndev->dev_addr)) {
325 netdev_warn(self->ndev, "MAC is invalid, will use random.");
326 eth_hw_addr_random(self->ndev);
327 }
328
329 #if defined(AQ_CFG_MAC_ADDR_PERMANENT)
330 {
331 static u8 mac_addr_permanent[] = AQ_CFG_MAC_ADDR_PERMANENT;
332
333 ether_addr_copy(self->ndev->dev_addr, mac_addr_permanent);
334 }
335 #endif
336
337 for (self->aq_vecs = 0; self->aq_vecs < aq_nic_get_cfg(self)->vecs;
338 self->aq_vecs++) {
339 self->aq_vec[self->aq_vecs] =
340 aq_vec_alloc(self, self->aq_vecs, aq_nic_get_cfg(self));
341 if (!self->aq_vec[self->aq_vecs]) {
342 err = -ENOMEM;
343 goto err_exit;
344 }
345 }
346
347 netif_carrier_off(self->ndev);
348
349 netif_tx_disable(self->ndev);
350
351 err = register_netdev(self->ndev);
352 if (err)
353 goto err_exit;
354
355 err_exit:
356 #if IS_ENABLED(CONFIG_MACSEC)
357 if (err)
358 aq_macsec_free(self);
359 #endif
360 return err;
361 }
362
aq_nic_ndev_init(struct aq_nic_s * self)363 void aq_nic_ndev_init(struct aq_nic_s *self)
364 {
365 const struct aq_hw_caps_s *aq_hw_caps = self->aq_nic_cfg.aq_hw_caps;
366 struct aq_nic_cfg_s *aq_nic_cfg = &self->aq_nic_cfg;
367
368 self->ndev->hw_features |= aq_hw_caps->hw_features;
369 self->ndev->features = aq_hw_caps->hw_features;
370 self->ndev->vlan_features |= NETIF_F_HW_CSUM | NETIF_F_RXCSUM |
371 NETIF_F_RXHASH | NETIF_F_SG |
372 NETIF_F_LRO | NETIF_F_TSO | NETIF_F_TSO6;
373 self->ndev->gso_partial_features = NETIF_F_GSO_UDP_L4;
374 self->ndev->priv_flags = aq_hw_caps->hw_priv_flags;
375 self->ndev->priv_flags |= IFF_LIVE_ADDR_CHANGE;
376
377 self->msg_enable = NETIF_MSG_DRV | NETIF_MSG_LINK;
378 self->ndev->mtu = aq_nic_cfg->mtu - ETH_HLEN;
379 self->ndev->max_mtu = aq_hw_caps->mtu - ETH_FCS_LEN - ETH_HLEN;
380
381 }
382
aq_nic_set_tx_ring(struct aq_nic_s * self,unsigned int idx,struct aq_ring_s * ring)383 void aq_nic_set_tx_ring(struct aq_nic_s *self, unsigned int idx,
384 struct aq_ring_s *ring)
385 {
386 self->aq_ring_tx[idx] = ring;
387 }
388
aq_nic_get_ndev(struct aq_nic_s * self)389 struct net_device *aq_nic_get_ndev(struct aq_nic_s *self)
390 {
391 return self->ndev;
392 }
393
aq_nic_init(struct aq_nic_s * self)394 int aq_nic_init(struct aq_nic_s *self)
395 {
396 struct aq_vec_s *aq_vec = NULL;
397 unsigned int i = 0U;
398 int err = 0;
399
400 self->power_state = AQ_HW_POWER_STATE_D0;
401 mutex_lock(&self->fwreq_mutex);
402 err = self->aq_hw_ops->hw_reset(self->aq_hw);
403 mutex_unlock(&self->fwreq_mutex);
404 if (err < 0)
405 goto err_exit;
406 /* Restore default settings */
407 aq_nic_set_downshift(self, self->aq_nic_cfg.downshift_counter);
408 aq_nic_set_media_detect(self, self->aq_nic_cfg.is_media_detect ?
409 AQ_HW_MEDIA_DETECT_CNT : 0);
410
411 err = self->aq_hw_ops->hw_init(self->aq_hw,
412 aq_nic_get_ndev(self)->dev_addr);
413 if (err < 0)
414 goto err_exit;
415
416 if (ATL_HW_IS_CHIP_FEATURE(self->aq_hw, ATLANTIC) &&
417 self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_TP) {
418 self->aq_hw->phy_id = HW_ATL_PHY_ID_MAX;
419 err = aq_phy_init(self->aq_hw);
420
421 /* Disable the PTP on NICs where it's known to cause datapath
422 * problems.
423 * Ideally this should have been done by PHY provisioning, but
424 * many units have been shipped with enabled PTP block already.
425 */
426 if (self->aq_nic_cfg.aq_hw_caps->quirks & AQ_NIC_QUIRK_BAD_PTP)
427 if (self->aq_hw->phy_id != HW_ATL_PHY_ID_MAX)
428 aq_phy_disable_ptp(self->aq_hw);
429 }
430
431 for (i = 0U; i < self->aq_vecs; i++) {
432 aq_vec = self->aq_vec[i];
433 err = aq_vec_ring_alloc(aq_vec, self, i,
434 aq_nic_get_cfg(self));
435 if (err)
436 goto err_exit;
437
438 aq_vec_init(aq_vec, self->aq_hw_ops, self->aq_hw);
439 }
440
441 if (aq_nic_get_cfg(self)->is_ptp) {
442 err = aq_ptp_init(self, self->irqvecs - 1);
443 if (err < 0)
444 goto err_exit;
445
446 err = aq_ptp_ring_alloc(self);
447 if (err < 0)
448 goto err_exit;
449
450 err = aq_ptp_ring_init(self);
451 if (err < 0)
452 goto err_exit;
453 }
454
455 netif_carrier_off(self->ndev);
456
457 err_exit:
458 return err;
459 }
460
aq_nic_start(struct aq_nic_s * self)461 int aq_nic_start(struct aq_nic_s *self)
462 {
463 struct aq_vec_s *aq_vec = NULL;
464 struct aq_nic_cfg_s *cfg;
465 unsigned int i = 0U;
466 int err = 0;
467
468 cfg = aq_nic_get_cfg(self);
469
470 err = self->aq_hw_ops->hw_multicast_list_set(self->aq_hw,
471 self->mc_list.ar,
472 self->mc_list.count);
473 if (err < 0)
474 goto err_exit;
475
476 err = self->aq_hw_ops->hw_packet_filter_set(self->aq_hw,
477 self->packet_filter);
478 if (err < 0)
479 goto err_exit;
480
481 for (i = 0U; self->aq_vecs > i; ++i) {
482 aq_vec = self->aq_vec[i];
483 err = aq_vec_start(aq_vec);
484 if (err < 0)
485 goto err_exit;
486 }
487
488 err = aq_ptp_ring_start(self);
489 if (err < 0)
490 goto err_exit;
491
492 aq_nic_set_loopback(self);
493
494 err = self->aq_hw_ops->hw_start(self->aq_hw);
495 if (err < 0)
496 goto err_exit;
497
498 err = aq_nic_update_interrupt_moderation_settings(self);
499 if (err)
500 goto err_exit;
501
502 INIT_WORK(&self->service_task, aq_nic_service_task);
503
504 timer_setup(&self->service_timer, aq_nic_service_timer_cb, 0);
505 aq_nic_service_timer_cb(&self->service_timer);
506
507 if (cfg->is_polling) {
508 timer_setup(&self->polling_timer, aq_nic_polling_timer_cb, 0);
509 mod_timer(&self->polling_timer, jiffies +
510 AQ_CFG_POLLING_TIMER_INTERVAL);
511 } else {
512 for (i = 0U; self->aq_vecs > i; ++i) {
513 aq_vec = self->aq_vec[i];
514 err = aq_pci_func_alloc_irq(self, i, self->ndev->name,
515 aq_vec_isr, aq_vec,
516 aq_vec_get_affinity_mask(aq_vec));
517 if (err < 0)
518 goto err_exit;
519 }
520
521 err = aq_ptp_irq_alloc(self);
522 if (err < 0)
523 goto err_exit;
524
525 if (cfg->link_irq_vec) {
526 int irqvec = pci_irq_vector(self->pdev,
527 cfg->link_irq_vec);
528 err = request_threaded_irq(irqvec, NULL,
529 aq_linkstate_threaded_isr,
530 IRQF_SHARED | IRQF_ONESHOT,
531 self->ndev->name, self);
532 if (err < 0)
533 goto err_exit;
534 self->msix_entry_mask |= (1 << cfg->link_irq_vec);
535 }
536
537 err = self->aq_hw_ops->hw_irq_enable(self->aq_hw,
538 AQ_CFG_IRQ_MASK);
539 if (err < 0)
540 goto err_exit;
541 }
542
543 err = netif_set_real_num_tx_queues(self->ndev,
544 self->aq_vecs * cfg->tcs);
545 if (err < 0)
546 goto err_exit;
547
548 err = netif_set_real_num_rx_queues(self->ndev,
549 self->aq_vecs * cfg->tcs);
550 if (err < 0)
551 goto err_exit;
552
553 for (i = 0; i < cfg->tcs; i++) {
554 u16 offset = self->aq_vecs * i;
555
556 netdev_set_tc_queue(self->ndev, i, self->aq_vecs, offset);
557 }
558 netif_tx_start_all_queues(self->ndev);
559
560 err_exit:
561 return err;
562 }
563
aq_nic_map_skb(struct aq_nic_s * self,struct sk_buff * skb,struct aq_ring_s * ring)564 unsigned int aq_nic_map_skb(struct aq_nic_s *self, struct sk_buff *skb,
565 struct aq_ring_s *ring)
566 {
567 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
568 struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(self);
569 struct device *dev = aq_nic_get_dev(self);
570 struct aq_ring_buff_s *first = NULL;
571 u8 ipver = ip_hdr(skb)->version;
572 struct aq_ring_buff_s *dx_buff;
573 bool need_context_tag = false;
574 unsigned int frag_count = 0U;
575 unsigned int ret = 0U;
576 unsigned int dx;
577 u8 l4proto = 0;
578
579 if (ipver == 4)
580 l4proto = ip_hdr(skb)->protocol;
581 else if (ipver == 6)
582 l4proto = ipv6_hdr(skb)->nexthdr;
583
584 dx = ring->sw_tail;
585 dx_buff = &ring->buff_ring[dx];
586 dx_buff->flags = 0U;
587
588 if (unlikely(skb_is_gso(skb))) {
589 dx_buff->mss = skb_shinfo(skb)->gso_size;
590 if (l4proto == IPPROTO_TCP) {
591 dx_buff->is_gso_tcp = 1U;
592 dx_buff->len_l4 = tcp_hdrlen(skb);
593 } else if (l4proto == IPPROTO_UDP) {
594 dx_buff->is_gso_udp = 1U;
595 dx_buff->len_l4 = sizeof(struct udphdr);
596 /* UDP GSO Hardware does not replace packet length. */
597 udp_hdr(skb)->len = htons(dx_buff->mss +
598 dx_buff->len_l4);
599 } else {
600 WARN_ONCE(true, "Bad GSO mode");
601 goto exit;
602 }
603 dx_buff->len_pkt = skb->len;
604 dx_buff->len_l2 = ETH_HLEN;
605 dx_buff->len_l3 = skb_network_header_len(skb);
606 dx_buff->eop_index = 0xffffU;
607 dx_buff->is_ipv6 = (ipver == 6);
608 need_context_tag = true;
609 }
610
611 if (cfg->is_vlan_tx_insert && skb_vlan_tag_present(skb)) {
612 dx_buff->vlan_tx_tag = skb_vlan_tag_get(skb);
613 dx_buff->len_pkt = skb->len;
614 dx_buff->is_vlan = 1U;
615 need_context_tag = true;
616 }
617
618 if (need_context_tag) {
619 dx = aq_ring_next_dx(ring, dx);
620 dx_buff = &ring->buff_ring[dx];
621 dx_buff->flags = 0U;
622 ++ret;
623 }
624
625 dx_buff->len = skb_headlen(skb);
626 dx_buff->pa = dma_map_single(dev,
627 skb->data,
628 dx_buff->len,
629 DMA_TO_DEVICE);
630
631 if (unlikely(dma_mapping_error(dev, dx_buff->pa))) {
632 ret = 0;
633 goto exit;
634 }
635
636 first = dx_buff;
637 dx_buff->len_pkt = skb->len;
638 dx_buff->is_sop = 1U;
639 dx_buff->is_mapped = 1U;
640 ++ret;
641
642 if (skb->ip_summed == CHECKSUM_PARTIAL) {
643 dx_buff->is_ip_cso = (htons(ETH_P_IP) == skb->protocol);
644 dx_buff->is_tcp_cso = (l4proto == IPPROTO_TCP);
645 dx_buff->is_udp_cso = (l4proto == IPPROTO_UDP);
646 }
647
648 for (; nr_frags--; ++frag_count) {
649 unsigned int frag_len = 0U;
650 unsigned int buff_offset = 0U;
651 unsigned int buff_size = 0U;
652 dma_addr_t frag_pa;
653 skb_frag_t *frag = &skb_shinfo(skb)->frags[frag_count];
654
655 frag_len = skb_frag_size(frag);
656
657 while (frag_len) {
658 if (frag_len > AQ_CFG_TX_FRAME_MAX)
659 buff_size = AQ_CFG_TX_FRAME_MAX;
660 else
661 buff_size = frag_len;
662
663 frag_pa = skb_frag_dma_map(dev,
664 frag,
665 buff_offset,
666 buff_size,
667 DMA_TO_DEVICE);
668
669 if (unlikely(dma_mapping_error(dev,
670 frag_pa)))
671 goto mapping_error;
672
673 dx = aq_ring_next_dx(ring, dx);
674 dx_buff = &ring->buff_ring[dx];
675
676 dx_buff->flags = 0U;
677 dx_buff->len = buff_size;
678 dx_buff->pa = frag_pa;
679 dx_buff->is_mapped = 1U;
680 dx_buff->eop_index = 0xffffU;
681
682 frag_len -= buff_size;
683 buff_offset += buff_size;
684
685 ++ret;
686 }
687 }
688
689 first->eop_index = dx;
690 dx_buff->is_eop = 1U;
691 dx_buff->skb = skb;
692 goto exit;
693
694 mapping_error:
695 for (dx = ring->sw_tail;
696 ret > 0;
697 --ret, dx = aq_ring_next_dx(ring, dx)) {
698 dx_buff = &ring->buff_ring[dx];
699
700 if (!(dx_buff->is_gso_tcp || dx_buff->is_gso_udp) &&
701 !dx_buff->is_vlan && dx_buff->pa) {
702 if (unlikely(dx_buff->is_sop)) {
703 dma_unmap_single(dev,
704 dx_buff->pa,
705 dx_buff->len,
706 DMA_TO_DEVICE);
707 } else {
708 dma_unmap_page(dev,
709 dx_buff->pa,
710 dx_buff->len,
711 DMA_TO_DEVICE);
712 }
713 }
714 }
715
716 exit:
717 return ret;
718 }
719
aq_nic_xmit(struct aq_nic_s * self,struct sk_buff * skb)720 int aq_nic_xmit(struct aq_nic_s *self, struct sk_buff *skb)
721 {
722 struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(self);
723 unsigned int vec = skb->queue_mapping % cfg->vecs;
724 unsigned int tc = skb->queue_mapping / cfg->vecs;
725 struct aq_ring_s *ring = NULL;
726 unsigned int frags = 0U;
727 int err = NETDEV_TX_OK;
728
729 frags = skb_shinfo(skb)->nr_frags + 1;
730
731 ring = self->aq_ring_tx[AQ_NIC_CFG_TCVEC2RING(cfg, tc, vec)];
732
733 if (frags > AQ_CFG_SKB_FRAGS_MAX) {
734 dev_kfree_skb_any(skb);
735 goto err_exit;
736 }
737
738 aq_ring_update_queue_state(ring);
739
740 if (cfg->priv_flags & BIT(AQ_HW_LOOPBACK_DMA_NET)) {
741 err = NETDEV_TX_BUSY;
742 goto err_exit;
743 }
744
745 /* Above status update may stop the queue. Check this. */
746 if (__netif_subqueue_stopped(self->ndev,
747 AQ_NIC_RING2QMAP(self, ring->idx))) {
748 err = NETDEV_TX_BUSY;
749 goto err_exit;
750 }
751
752 frags = aq_nic_map_skb(self, skb, ring);
753
754 if (likely(frags)) {
755 err = self->aq_hw_ops->hw_ring_tx_xmit(self->aq_hw,
756 ring, frags);
757 } else {
758 err = NETDEV_TX_BUSY;
759 }
760
761 err_exit:
762 return err;
763 }
764
aq_nic_update_interrupt_moderation_settings(struct aq_nic_s * self)765 int aq_nic_update_interrupt_moderation_settings(struct aq_nic_s *self)
766 {
767 return self->aq_hw_ops->hw_interrupt_moderation_set(self->aq_hw);
768 }
769
aq_nic_set_packet_filter(struct aq_nic_s * self,unsigned int flags)770 int aq_nic_set_packet_filter(struct aq_nic_s *self, unsigned int flags)
771 {
772 int err = 0;
773
774 err = self->aq_hw_ops->hw_packet_filter_set(self->aq_hw, flags);
775 if (err < 0)
776 goto err_exit;
777
778 self->packet_filter = flags;
779
780 err_exit:
781 return err;
782 }
783
aq_nic_set_multicast_list(struct aq_nic_s * self,struct net_device * ndev)784 int aq_nic_set_multicast_list(struct aq_nic_s *self, struct net_device *ndev)
785 {
786 const struct aq_hw_ops *hw_ops = self->aq_hw_ops;
787 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
788 unsigned int packet_filter = ndev->flags;
789 struct netdev_hw_addr *ha = NULL;
790 unsigned int i = 0U;
791 int err = 0;
792
793 self->mc_list.count = 0;
794 if (netdev_uc_count(ndev) > AQ_HW_MULTICAST_ADDRESS_MAX) {
795 packet_filter |= IFF_PROMISC;
796 } else {
797 netdev_for_each_uc_addr(ha, ndev) {
798 ether_addr_copy(self->mc_list.ar[i++], ha->addr);
799 }
800 }
801
802 cfg->is_mc_list_enabled = !!(packet_filter & IFF_MULTICAST);
803 if (cfg->is_mc_list_enabled) {
804 if (i + netdev_mc_count(ndev) > AQ_HW_MULTICAST_ADDRESS_MAX) {
805 packet_filter |= IFF_ALLMULTI;
806 } else {
807 netdev_for_each_mc_addr(ha, ndev) {
808 ether_addr_copy(self->mc_list.ar[i++],
809 ha->addr);
810 }
811 }
812 }
813
814 if (i > 0 && i <= AQ_HW_MULTICAST_ADDRESS_MAX) {
815 self->mc_list.count = i;
816 err = hw_ops->hw_multicast_list_set(self->aq_hw,
817 self->mc_list.ar,
818 self->mc_list.count);
819 if (err < 0)
820 return err;
821 }
822
823 return aq_nic_set_packet_filter(self, packet_filter);
824 }
825
aq_nic_set_mtu(struct aq_nic_s * self,int new_mtu)826 int aq_nic_set_mtu(struct aq_nic_s *self, int new_mtu)
827 {
828 self->aq_nic_cfg.mtu = new_mtu;
829
830 return 0;
831 }
832
aq_nic_set_mac(struct aq_nic_s * self,struct net_device * ndev)833 int aq_nic_set_mac(struct aq_nic_s *self, struct net_device *ndev)
834 {
835 return self->aq_hw_ops->hw_set_mac_address(self->aq_hw, ndev->dev_addr);
836 }
837
aq_nic_get_link_speed(struct aq_nic_s * self)838 unsigned int aq_nic_get_link_speed(struct aq_nic_s *self)
839 {
840 return self->link_status.mbps;
841 }
842
aq_nic_get_regs(struct aq_nic_s * self,struct ethtool_regs * regs,void * p)843 int aq_nic_get_regs(struct aq_nic_s *self, struct ethtool_regs *regs, void *p)
844 {
845 u32 *regs_buff = p;
846 int err = 0;
847
848 if (unlikely(!self->aq_hw_ops->hw_get_regs))
849 return -EOPNOTSUPP;
850
851 regs->version = 1;
852
853 err = self->aq_hw_ops->hw_get_regs(self->aq_hw,
854 self->aq_nic_cfg.aq_hw_caps,
855 regs_buff);
856 if (err < 0)
857 goto err_exit;
858
859 err_exit:
860 return err;
861 }
862
aq_nic_get_regs_count(struct aq_nic_s * self)863 int aq_nic_get_regs_count(struct aq_nic_s *self)
864 {
865 if (unlikely(!self->aq_hw_ops->hw_get_regs))
866 return 0;
867
868 return self->aq_nic_cfg.aq_hw_caps->mac_regs_count;
869 }
870
aq_nic_get_stats(struct aq_nic_s * self,u64 * data)871 u64 *aq_nic_get_stats(struct aq_nic_s *self, u64 *data)
872 {
873 struct aq_stats_s *stats;
874 unsigned int count = 0U;
875 unsigned int i = 0U;
876 unsigned int tc;
877
878 if (self->aq_fw_ops->update_stats) {
879 mutex_lock(&self->fwreq_mutex);
880 self->aq_fw_ops->update_stats(self->aq_hw);
881 mutex_unlock(&self->fwreq_mutex);
882 }
883 stats = self->aq_hw_ops->hw_get_hw_stats(self->aq_hw);
884
885 if (!stats)
886 goto err_exit;
887
888 data[i] = stats->uprc + stats->mprc + stats->bprc;
889 data[++i] = stats->uprc;
890 data[++i] = stats->mprc;
891 data[++i] = stats->bprc;
892 data[++i] = stats->erpt;
893 data[++i] = stats->uptc + stats->mptc + stats->bptc;
894 data[++i] = stats->uptc;
895 data[++i] = stats->mptc;
896 data[++i] = stats->bptc;
897 data[++i] = stats->ubrc;
898 data[++i] = stats->ubtc;
899 data[++i] = stats->mbrc;
900 data[++i] = stats->mbtc;
901 data[++i] = stats->bbrc;
902 data[++i] = stats->bbtc;
903 if (stats->brc)
904 data[++i] = stats->brc;
905 else
906 data[++i] = stats->ubrc + stats->mbrc + stats->bbrc;
907 if (stats->btc)
908 data[++i] = stats->btc;
909 else
910 data[++i] = stats->ubtc + stats->mbtc + stats->bbtc;
911 data[++i] = stats->dma_pkt_rc;
912 data[++i] = stats->dma_pkt_tc;
913 data[++i] = stats->dma_oct_rc;
914 data[++i] = stats->dma_oct_tc;
915 data[++i] = stats->dpc;
916
917 i++;
918
919 data += i;
920
921 for (tc = 0U; tc < self->aq_nic_cfg.tcs; tc++) {
922 for (i = 0U; self->aq_vecs > i; ++i) {
923 if (!self->aq_vec[i])
924 break;
925 data += count;
926 count = aq_vec_get_sw_stats(self->aq_vec[i], tc, data);
927 }
928 }
929
930 data += count;
931
932 err_exit:
933 return data;
934 }
935
aq_nic_update_ndev_stats(struct aq_nic_s * self)936 static void aq_nic_update_ndev_stats(struct aq_nic_s *self)
937 {
938 struct aq_stats_s *stats = self->aq_hw_ops->hw_get_hw_stats(self->aq_hw);
939 struct net_device *ndev = self->ndev;
940
941 ndev->stats.rx_packets = stats->dma_pkt_rc;
942 ndev->stats.rx_bytes = stats->dma_oct_rc;
943 ndev->stats.rx_errors = stats->erpr;
944 ndev->stats.rx_dropped = stats->dpc;
945 ndev->stats.tx_packets = stats->dma_pkt_tc;
946 ndev->stats.tx_bytes = stats->dma_oct_tc;
947 ndev->stats.tx_errors = stats->erpt;
948 ndev->stats.multicast = stats->mprc;
949 }
950
aq_nic_get_link_ksettings(struct aq_nic_s * self,struct ethtool_link_ksettings * cmd)951 void aq_nic_get_link_ksettings(struct aq_nic_s *self,
952 struct ethtool_link_ksettings *cmd)
953 {
954 u32 lp_link_speed_msk;
955
956 if (self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_FIBRE)
957 cmd->base.port = PORT_FIBRE;
958 else
959 cmd->base.port = PORT_TP;
960
961 cmd->base.duplex = DUPLEX_UNKNOWN;
962 if (self->link_status.mbps)
963 cmd->base.duplex = self->link_status.full_duplex ?
964 DUPLEX_FULL : DUPLEX_HALF;
965 cmd->base.autoneg = self->aq_nic_cfg.is_autoneg;
966
967 ethtool_link_ksettings_zero_link_mode(cmd, supported);
968
969 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_10G)
970 ethtool_link_ksettings_add_link_mode(cmd, supported,
971 10000baseT_Full);
972
973 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_5G)
974 ethtool_link_ksettings_add_link_mode(cmd, supported,
975 5000baseT_Full);
976
977 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_2G5)
978 ethtool_link_ksettings_add_link_mode(cmd, supported,
979 2500baseT_Full);
980
981 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_1G)
982 ethtool_link_ksettings_add_link_mode(cmd, supported,
983 1000baseT_Full);
984
985 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_1G_HALF)
986 ethtool_link_ksettings_add_link_mode(cmd, supported,
987 1000baseT_Half);
988
989 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_100M)
990 ethtool_link_ksettings_add_link_mode(cmd, supported,
991 100baseT_Full);
992
993 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_100M_HALF)
994 ethtool_link_ksettings_add_link_mode(cmd, supported,
995 100baseT_Half);
996
997 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_10M)
998 ethtool_link_ksettings_add_link_mode(cmd, supported,
999 10baseT_Full);
1000
1001 if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_10M_HALF)
1002 ethtool_link_ksettings_add_link_mode(cmd, supported,
1003 10baseT_Half);
1004
1005 if (self->aq_nic_cfg.aq_hw_caps->flow_control) {
1006 ethtool_link_ksettings_add_link_mode(cmd, supported,
1007 Pause);
1008 ethtool_link_ksettings_add_link_mode(cmd, supported,
1009 Asym_Pause);
1010 }
1011
1012 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
1013
1014 if (self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_FIBRE)
1015 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
1016 else
1017 ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
1018
1019 ethtool_link_ksettings_zero_link_mode(cmd, advertising);
1020
1021 if (self->aq_nic_cfg.is_autoneg)
1022 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
1023
1024 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_10G)
1025 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1026 10000baseT_Full);
1027
1028 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_5G)
1029 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1030 5000baseT_Full);
1031
1032 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_2G5)
1033 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1034 2500baseT_Full);
1035
1036 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_1G)
1037 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1038 1000baseT_Full);
1039
1040 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_1G_HALF)
1041 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1042 1000baseT_Half);
1043
1044 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_100M)
1045 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1046 100baseT_Full);
1047
1048 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_100M_HALF)
1049 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1050 100baseT_Half);
1051
1052 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_10M)
1053 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1054 10baseT_Full);
1055
1056 if (self->aq_nic_cfg.link_speed_msk & AQ_NIC_RATE_10M_HALF)
1057 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1058 10baseT_Half);
1059
1060 if (self->aq_nic_cfg.fc.cur & AQ_NIC_FC_RX)
1061 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1062 Pause);
1063
1064 /* Asym is when either RX or TX, but not both */
1065 if (!!(self->aq_nic_cfg.fc.cur & AQ_NIC_FC_TX) ^
1066 !!(self->aq_nic_cfg.fc.cur & AQ_NIC_FC_RX))
1067 ethtool_link_ksettings_add_link_mode(cmd, advertising,
1068 Asym_Pause);
1069
1070 if (self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_FIBRE)
1071 ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE);
1072 else
1073 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
1074
1075 ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising);
1076 lp_link_speed_msk = self->aq_hw->aq_link_status.lp_link_speed_msk;
1077
1078 if (lp_link_speed_msk & AQ_NIC_RATE_10G)
1079 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1080 10000baseT_Full);
1081
1082 if (lp_link_speed_msk & AQ_NIC_RATE_5G)
1083 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1084 5000baseT_Full);
1085
1086 if (lp_link_speed_msk & AQ_NIC_RATE_2G5)
1087 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1088 2500baseT_Full);
1089
1090 if (lp_link_speed_msk & AQ_NIC_RATE_1G)
1091 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1092 1000baseT_Full);
1093
1094 if (lp_link_speed_msk & AQ_NIC_RATE_1G_HALF)
1095 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1096 1000baseT_Half);
1097
1098 if (lp_link_speed_msk & AQ_NIC_RATE_100M)
1099 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1100 100baseT_Full);
1101
1102 if (lp_link_speed_msk & AQ_NIC_RATE_100M_HALF)
1103 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1104 100baseT_Half);
1105
1106 if (lp_link_speed_msk & AQ_NIC_RATE_10M)
1107 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1108 10baseT_Full);
1109
1110 if (lp_link_speed_msk & AQ_NIC_RATE_10M_HALF)
1111 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1112 10baseT_Half);
1113
1114 if (self->aq_hw->aq_link_status.lp_flow_control & AQ_NIC_FC_RX)
1115 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1116 Pause);
1117 if (!!(self->aq_hw->aq_link_status.lp_flow_control & AQ_NIC_FC_TX) ^
1118 !!(self->aq_hw->aq_link_status.lp_flow_control & AQ_NIC_FC_RX))
1119 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising,
1120 Asym_Pause);
1121 }
1122
aq_nic_set_link_ksettings(struct aq_nic_s * self,const struct ethtool_link_ksettings * cmd)1123 int aq_nic_set_link_ksettings(struct aq_nic_s *self,
1124 const struct ethtool_link_ksettings *cmd)
1125 {
1126 int fduplex = (cmd->base.duplex == DUPLEX_FULL);
1127 u32 speed = cmd->base.speed;
1128 u32 rate = 0U;
1129 int err = 0;
1130
1131 if (!fduplex && speed > SPEED_1000) {
1132 err = -EINVAL;
1133 goto err_exit;
1134 }
1135
1136 if (cmd->base.autoneg == AUTONEG_ENABLE) {
1137 rate = self->aq_nic_cfg.aq_hw_caps->link_speed_msk;
1138 self->aq_nic_cfg.is_autoneg = true;
1139 } else {
1140 switch (speed) {
1141 case SPEED_10:
1142 rate = fduplex ? AQ_NIC_RATE_10M : AQ_NIC_RATE_10M_HALF;
1143 break;
1144
1145 case SPEED_100:
1146 rate = fduplex ? AQ_NIC_RATE_100M
1147 : AQ_NIC_RATE_100M_HALF;
1148 break;
1149
1150 case SPEED_1000:
1151 rate = fduplex ? AQ_NIC_RATE_1G : AQ_NIC_RATE_1G_HALF;
1152 break;
1153
1154 case SPEED_2500:
1155 rate = AQ_NIC_RATE_2G5;
1156 break;
1157
1158 case SPEED_5000:
1159 rate = AQ_NIC_RATE_5G;
1160 break;
1161
1162 case SPEED_10000:
1163 rate = AQ_NIC_RATE_10G;
1164 break;
1165
1166 default:
1167 err = -1;
1168 goto err_exit;
1169 }
1170 if (!(self->aq_nic_cfg.aq_hw_caps->link_speed_msk & rate)) {
1171 err = -1;
1172 goto err_exit;
1173 }
1174
1175 self->aq_nic_cfg.is_autoneg = false;
1176 }
1177
1178 mutex_lock(&self->fwreq_mutex);
1179 err = self->aq_fw_ops->set_link_speed(self->aq_hw, rate);
1180 mutex_unlock(&self->fwreq_mutex);
1181 if (err < 0)
1182 goto err_exit;
1183
1184 self->aq_nic_cfg.link_speed_msk = rate;
1185
1186 err_exit:
1187 return err;
1188 }
1189
aq_nic_get_cfg(struct aq_nic_s * self)1190 struct aq_nic_cfg_s *aq_nic_get_cfg(struct aq_nic_s *self)
1191 {
1192 return &self->aq_nic_cfg;
1193 }
1194
aq_nic_get_fw_version(struct aq_nic_s * self)1195 u32 aq_nic_get_fw_version(struct aq_nic_s *self)
1196 {
1197 return self->aq_hw_ops->hw_get_fw_version(self->aq_hw);
1198 }
1199
aq_nic_set_loopback(struct aq_nic_s * self)1200 int aq_nic_set_loopback(struct aq_nic_s *self)
1201 {
1202 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
1203
1204 if (!self->aq_hw_ops->hw_set_loopback ||
1205 !self->aq_fw_ops->set_phyloopback)
1206 return -EOPNOTSUPP;
1207
1208 mutex_lock(&self->fwreq_mutex);
1209 self->aq_hw_ops->hw_set_loopback(self->aq_hw,
1210 AQ_HW_LOOPBACK_DMA_SYS,
1211 !!(cfg->priv_flags &
1212 BIT(AQ_HW_LOOPBACK_DMA_SYS)));
1213
1214 self->aq_hw_ops->hw_set_loopback(self->aq_hw,
1215 AQ_HW_LOOPBACK_PKT_SYS,
1216 !!(cfg->priv_flags &
1217 BIT(AQ_HW_LOOPBACK_PKT_SYS)));
1218
1219 self->aq_hw_ops->hw_set_loopback(self->aq_hw,
1220 AQ_HW_LOOPBACK_DMA_NET,
1221 !!(cfg->priv_flags &
1222 BIT(AQ_HW_LOOPBACK_DMA_NET)));
1223
1224 self->aq_fw_ops->set_phyloopback(self->aq_hw,
1225 AQ_HW_LOOPBACK_PHYINT_SYS,
1226 !!(cfg->priv_flags &
1227 BIT(AQ_HW_LOOPBACK_PHYINT_SYS)));
1228
1229 self->aq_fw_ops->set_phyloopback(self->aq_hw,
1230 AQ_HW_LOOPBACK_PHYEXT_SYS,
1231 !!(cfg->priv_flags &
1232 BIT(AQ_HW_LOOPBACK_PHYEXT_SYS)));
1233 mutex_unlock(&self->fwreq_mutex);
1234
1235 return 0;
1236 }
1237
aq_nic_stop(struct aq_nic_s * self)1238 int aq_nic_stop(struct aq_nic_s *self)
1239 {
1240 unsigned int i = 0U;
1241
1242 netif_tx_disable(self->ndev);
1243 netif_carrier_off(self->ndev);
1244
1245 del_timer_sync(&self->service_timer);
1246 cancel_work_sync(&self->service_task);
1247
1248 self->aq_hw_ops->hw_irq_disable(self->aq_hw, AQ_CFG_IRQ_MASK);
1249
1250 if (self->aq_nic_cfg.is_polling)
1251 del_timer_sync(&self->polling_timer);
1252 else
1253 aq_pci_func_free_irqs(self);
1254
1255 aq_ptp_irq_free(self);
1256
1257 for (i = 0U; self->aq_vecs > i; ++i)
1258 aq_vec_stop(self->aq_vec[i]);
1259
1260 aq_ptp_ring_stop(self);
1261
1262 return self->aq_hw_ops->hw_stop(self->aq_hw);
1263 }
1264
aq_nic_set_power(struct aq_nic_s * self)1265 void aq_nic_set_power(struct aq_nic_s *self)
1266 {
1267 if (self->power_state != AQ_HW_POWER_STATE_D0 ||
1268 self->aq_hw->aq_nic_cfg->wol)
1269 if (likely(self->aq_fw_ops->set_power)) {
1270 mutex_lock(&self->fwreq_mutex);
1271 self->aq_fw_ops->set_power(self->aq_hw,
1272 self->power_state,
1273 self->ndev->dev_addr);
1274 mutex_unlock(&self->fwreq_mutex);
1275 }
1276 }
1277
aq_nic_deinit(struct aq_nic_s * self,bool link_down)1278 void aq_nic_deinit(struct aq_nic_s *self, bool link_down)
1279 {
1280 struct aq_vec_s *aq_vec = NULL;
1281 unsigned int i = 0U;
1282
1283 if (!self)
1284 goto err_exit;
1285
1286 for (i = 0U; i < self->aq_vecs; i++) {
1287 aq_vec = self->aq_vec[i];
1288 aq_vec_deinit(aq_vec);
1289 aq_vec_ring_free(aq_vec);
1290 }
1291
1292 aq_ptp_unregister(self);
1293 aq_ptp_ring_deinit(self);
1294 aq_ptp_ring_free(self);
1295 aq_ptp_free(self);
1296
1297 if (likely(self->aq_fw_ops->deinit) && link_down) {
1298 mutex_lock(&self->fwreq_mutex);
1299 self->aq_fw_ops->deinit(self->aq_hw);
1300 mutex_unlock(&self->fwreq_mutex);
1301 }
1302
1303 err_exit:;
1304 }
1305
aq_nic_free_vectors(struct aq_nic_s * self)1306 void aq_nic_free_vectors(struct aq_nic_s *self)
1307 {
1308 unsigned int i = 0U;
1309
1310 if (!self)
1311 goto err_exit;
1312
1313 for (i = ARRAY_SIZE(self->aq_vec); i--;) {
1314 if (self->aq_vec[i]) {
1315 aq_vec_free(self->aq_vec[i]);
1316 self->aq_vec[i] = NULL;
1317 }
1318 }
1319
1320 err_exit:;
1321 }
1322
aq_nic_realloc_vectors(struct aq_nic_s * self)1323 int aq_nic_realloc_vectors(struct aq_nic_s *self)
1324 {
1325 struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(self);
1326
1327 aq_nic_free_vectors(self);
1328
1329 for (self->aq_vecs = 0; self->aq_vecs < cfg->vecs; self->aq_vecs++) {
1330 self->aq_vec[self->aq_vecs] = aq_vec_alloc(self, self->aq_vecs,
1331 cfg);
1332 if (unlikely(!self->aq_vec[self->aq_vecs]))
1333 return -ENOMEM;
1334 }
1335
1336 return 0;
1337 }
1338
aq_nic_shutdown(struct aq_nic_s * self)1339 void aq_nic_shutdown(struct aq_nic_s *self)
1340 {
1341 int err = 0;
1342
1343 if (!self->ndev)
1344 return;
1345
1346 rtnl_lock();
1347
1348 netif_device_detach(self->ndev);
1349
1350 if (netif_running(self->ndev)) {
1351 err = aq_nic_stop(self);
1352 if (err < 0)
1353 goto err_exit;
1354 }
1355 aq_nic_deinit(self, !self->aq_hw->aq_nic_cfg->wol);
1356 aq_nic_set_power(self);
1357
1358 err_exit:
1359 rtnl_unlock();
1360 }
1361
aq_nic_reserve_filter(struct aq_nic_s * self,enum aq_rx_filter_type type)1362 u8 aq_nic_reserve_filter(struct aq_nic_s *self, enum aq_rx_filter_type type)
1363 {
1364 u8 location = 0xFF;
1365 u32 fltr_cnt;
1366 u32 n_bit;
1367
1368 switch (type) {
1369 case aq_rx_filter_ethertype:
1370 location = AQ_RX_LAST_LOC_FETHERT - AQ_RX_FIRST_LOC_FETHERT -
1371 self->aq_hw_rx_fltrs.fet_reserved_count;
1372 self->aq_hw_rx_fltrs.fet_reserved_count++;
1373 break;
1374 case aq_rx_filter_l3l4:
1375 fltr_cnt = AQ_RX_LAST_LOC_FL3L4 - AQ_RX_FIRST_LOC_FL3L4;
1376 n_bit = fltr_cnt - self->aq_hw_rx_fltrs.fl3l4.reserved_count;
1377
1378 self->aq_hw_rx_fltrs.fl3l4.active_ipv4 |= BIT(n_bit);
1379 self->aq_hw_rx_fltrs.fl3l4.reserved_count++;
1380 location = n_bit;
1381 break;
1382 default:
1383 break;
1384 }
1385
1386 return location;
1387 }
1388
aq_nic_release_filter(struct aq_nic_s * self,enum aq_rx_filter_type type,u32 location)1389 void aq_nic_release_filter(struct aq_nic_s *self, enum aq_rx_filter_type type,
1390 u32 location)
1391 {
1392 switch (type) {
1393 case aq_rx_filter_ethertype:
1394 self->aq_hw_rx_fltrs.fet_reserved_count--;
1395 break;
1396 case aq_rx_filter_l3l4:
1397 self->aq_hw_rx_fltrs.fl3l4.reserved_count--;
1398 self->aq_hw_rx_fltrs.fl3l4.active_ipv4 &= ~BIT(location);
1399 break;
1400 default:
1401 break;
1402 }
1403 }
1404
aq_nic_set_downshift(struct aq_nic_s * self,int val)1405 int aq_nic_set_downshift(struct aq_nic_s *self, int val)
1406 {
1407 int err = 0;
1408 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
1409
1410 if (!self->aq_fw_ops->set_downshift)
1411 return -EOPNOTSUPP;
1412
1413 if (val > 15) {
1414 netdev_err(self->ndev, "downshift counter should be <= 15\n");
1415 return -EINVAL;
1416 }
1417 cfg->downshift_counter = val;
1418
1419 mutex_lock(&self->fwreq_mutex);
1420 err = self->aq_fw_ops->set_downshift(self->aq_hw, cfg->downshift_counter);
1421 mutex_unlock(&self->fwreq_mutex);
1422
1423 return err;
1424 }
1425
aq_nic_set_media_detect(struct aq_nic_s * self,int val)1426 int aq_nic_set_media_detect(struct aq_nic_s *self, int val)
1427 {
1428 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
1429 int err = 0;
1430
1431 if (!self->aq_fw_ops->set_media_detect)
1432 return -EOPNOTSUPP;
1433
1434 if (val > 0 && val != AQ_HW_MEDIA_DETECT_CNT) {
1435 netdev_err(self->ndev, "EDPD on this device could have only fixed value of %d\n",
1436 AQ_HW_MEDIA_DETECT_CNT);
1437 return -EINVAL;
1438 }
1439
1440 mutex_lock(&self->fwreq_mutex);
1441 err = self->aq_fw_ops->set_media_detect(self->aq_hw, !!val);
1442 mutex_unlock(&self->fwreq_mutex);
1443
1444 /* msecs plays no role - configuration is always fixed in PHY */
1445 if (!err)
1446 cfg->is_media_detect = !!val;
1447
1448 return err;
1449 }
1450
aq_nic_setup_tc_mqprio(struct aq_nic_s * self,u32 tcs,u8 * prio_tc_map)1451 int aq_nic_setup_tc_mqprio(struct aq_nic_s *self, u32 tcs, u8 *prio_tc_map)
1452 {
1453 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
1454 const unsigned int prev_vecs = cfg->vecs;
1455 bool ndev_running;
1456 int err = 0;
1457 int i;
1458
1459 /* if already the same configuration or
1460 * disable request (tcs is 0) and we already is disabled
1461 */
1462 if (tcs == cfg->tcs || (tcs == 0 && !cfg->is_qos))
1463 return 0;
1464
1465 ndev_running = netif_running(self->ndev);
1466 if (ndev_running)
1467 dev_close(self->ndev);
1468
1469 cfg->tcs = tcs;
1470 if (cfg->tcs == 0)
1471 cfg->tcs = 1;
1472 if (prio_tc_map)
1473 memcpy(cfg->prio_tc_map, prio_tc_map, sizeof(cfg->prio_tc_map));
1474 else
1475 for (i = 0; i < sizeof(cfg->prio_tc_map); i++)
1476 cfg->prio_tc_map[i] = cfg->tcs * i / 8;
1477
1478 cfg->is_qos = (tcs != 0 ? true : false);
1479 cfg->is_ptp = (cfg->tcs <= AQ_HW_PTP_TC);
1480 if (!cfg->is_ptp)
1481 netdev_warn(self->ndev, "%s\n",
1482 "PTP is auto disabled due to requested TC count.");
1483
1484 netdev_set_num_tc(self->ndev, cfg->tcs);
1485
1486 /* Changing the number of TCs might change the number of vectors */
1487 aq_nic_cfg_update_num_vecs(self);
1488 if (prev_vecs != cfg->vecs) {
1489 err = aq_nic_realloc_vectors(self);
1490 if (err)
1491 goto err_exit;
1492 }
1493
1494 if (ndev_running)
1495 err = dev_open(self->ndev, NULL);
1496
1497 err_exit:
1498 return err;
1499 }
1500
aq_nic_setup_tc_max_rate(struct aq_nic_s * self,const unsigned int tc,const u32 max_rate)1501 int aq_nic_setup_tc_max_rate(struct aq_nic_s *self, const unsigned int tc,
1502 const u32 max_rate)
1503 {
1504 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
1505
1506 if (tc >= AQ_CFG_TCS_MAX)
1507 return -EINVAL;
1508
1509 if (max_rate && max_rate < 10) {
1510 netdev_warn(self->ndev,
1511 "Setting %s to the minimum usable value of %dMbps.\n",
1512 "max rate", 10);
1513 cfg->tc_max_rate[tc] = 10;
1514 } else {
1515 cfg->tc_max_rate[tc] = max_rate;
1516 }
1517
1518 return 0;
1519 }
1520
aq_nic_setup_tc_min_rate(struct aq_nic_s * self,const unsigned int tc,const u32 min_rate)1521 int aq_nic_setup_tc_min_rate(struct aq_nic_s *self, const unsigned int tc,
1522 const u32 min_rate)
1523 {
1524 struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg;
1525
1526 if (tc >= AQ_CFG_TCS_MAX)
1527 return -EINVAL;
1528
1529 if (min_rate)
1530 set_bit(tc, &cfg->tc_min_rate_msk);
1531 else
1532 clear_bit(tc, &cfg->tc_min_rate_msk);
1533
1534 if (min_rate && min_rate < 20) {
1535 netdev_warn(self->ndev,
1536 "Setting %s to the minimum usable value of %dMbps.\n",
1537 "min rate", 20);
1538 cfg->tc_min_rate[tc] = 20;
1539 } else {
1540 cfg->tc_min_rate[tc] = min_rate;
1541 }
1542
1543 return 0;
1544 }
1545