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1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * otg.c - ChipIdea USB IP core OTG driver
4  *
5  * Copyright (C) 2013 Freescale Semiconductor, Inc.
6  *
7  * Author: Peter Chen
8  */
9 
10 /*
11  * This file mainly handles otgsc register, OTG fsm operations for HNP and SRP
12  * are also included.
13  */
14 
15 #include <linux/usb/otg.h>
16 #include <linux/usb/gadget.h>
17 #include <linux/usb/chipidea.h>
18 
19 #include "ci.h"
20 #include "bits.h"
21 #include "otg.h"
22 #include "otg_fsm.h"
23 
24 /**
25  * hw_read_otgsc returns otgsc register bits value.
26  * @ci: the controller
27  * @mask: bitfield mask
28  */
hw_read_otgsc(struct ci_hdrc * ci,u32 mask)29 u32 hw_read_otgsc(struct ci_hdrc *ci, u32 mask)
30 {
31 	struct ci_hdrc_cable *cable;
32 	u32 val = hw_read(ci, OP_OTGSC, mask);
33 
34 	/*
35 	 * If using extcon framework for VBUS and/or ID signal
36 	 * detection overwrite OTGSC register value
37 	 */
38 	cable = &ci->platdata->vbus_extcon;
39 	if (!IS_ERR(cable->edev) || ci->role_switch) {
40 		if (cable->changed)
41 			val |= OTGSC_BSVIS;
42 		else
43 			val &= ~OTGSC_BSVIS;
44 
45 		if (cable->connected)
46 			val |= OTGSC_BSV;
47 		else
48 			val &= ~OTGSC_BSV;
49 
50 		if (cable->enabled)
51 			val |= OTGSC_BSVIE;
52 		else
53 			val &= ~OTGSC_BSVIE;
54 	}
55 
56 	cable = &ci->platdata->id_extcon;
57 	if (!IS_ERR(cable->edev) || ci->role_switch) {
58 		if (cable->changed)
59 			val |= OTGSC_IDIS;
60 		else
61 			val &= ~OTGSC_IDIS;
62 
63 		if (cable->connected)
64 			val &= ~OTGSC_ID; /* host */
65 		else
66 			val |= OTGSC_ID; /* device */
67 
68 		if (cable->enabled)
69 			val |= OTGSC_IDIE;
70 		else
71 			val &= ~OTGSC_IDIE;
72 	}
73 
74 	return val & mask;
75 }
76 
77 /**
78  * hw_write_otgsc updates target bits of OTGSC register.
79  * @ci: the controller
80  * @mask: bitfield mask
81  * @data: to be written
82  */
hw_write_otgsc(struct ci_hdrc * ci,u32 mask,u32 data)83 void hw_write_otgsc(struct ci_hdrc *ci, u32 mask, u32 data)
84 {
85 	struct ci_hdrc_cable *cable;
86 
87 	cable = &ci->platdata->vbus_extcon;
88 	if (!IS_ERR(cable->edev) || ci->role_switch) {
89 		if (data & mask & OTGSC_BSVIS)
90 			cable->changed = false;
91 
92 		/* Don't enable vbus interrupt if using external notifier */
93 		if (data & mask & OTGSC_BSVIE) {
94 			cable->enabled = true;
95 			data &= ~OTGSC_BSVIE;
96 		} else if (mask & OTGSC_BSVIE) {
97 			cable->enabled = false;
98 		}
99 	}
100 
101 	cable = &ci->platdata->id_extcon;
102 	if (!IS_ERR(cable->edev) || ci->role_switch) {
103 		if (data & mask & OTGSC_IDIS)
104 			cable->changed = false;
105 
106 		/* Don't enable id interrupt if using external notifier */
107 		if (data & mask & OTGSC_IDIE) {
108 			cable->enabled = true;
109 			data &= ~OTGSC_IDIE;
110 		} else if (mask & OTGSC_IDIE) {
111 			cable->enabled = false;
112 		}
113 	}
114 
115 	hw_write(ci, OP_OTGSC, mask | OTGSC_INT_STATUS_BITS, data);
116 }
117 
118 /**
119  * ci_otg_role - pick role based on ID pin state
120  * @ci: the controller
121  */
ci_otg_role(struct ci_hdrc * ci)122 enum ci_role ci_otg_role(struct ci_hdrc *ci)
123 {
124 	enum ci_role role = hw_read_otgsc(ci, OTGSC_ID)
125 		? CI_ROLE_GADGET
126 		: CI_ROLE_HOST;
127 
128 	return role;
129 }
130 
ci_handle_vbus_change(struct ci_hdrc * ci)131 void ci_handle_vbus_change(struct ci_hdrc *ci)
132 {
133 	if (!ci->is_otg)
134 		return;
135 
136 	if (hw_read_otgsc(ci, OTGSC_BSV) && !ci->vbus_active)
137 		usb_gadget_vbus_connect(&ci->gadget);
138 	else if (!hw_read_otgsc(ci, OTGSC_BSV) && ci->vbus_active)
139 		usb_gadget_vbus_disconnect(&ci->gadget);
140 }
141 
142 /**
143  * When we switch to device mode, the vbus value should be lower
144  * than OTGSC_BSV before connecting to host.
145  *
146  * @ci: the controller
147  *
148  * This function returns an error code if timeout
149  */
hw_wait_vbus_lower_bsv(struct ci_hdrc * ci)150 static int hw_wait_vbus_lower_bsv(struct ci_hdrc *ci)
151 {
152 	unsigned long elapse = jiffies + msecs_to_jiffies(5000);
153 	u32 mask = OTGSC_BSV;
154 
155 	while (hw_read_otgsc(ci, mask)) {
156 		if (time_after(jiffies, elapse)) {
157 			dev_err(ci->dev, "timeout waiting for %08x in OTGSC\n",
158 					mask);
159 			return -ETIMEDOUT;
160 		}
161 		msleep(20);
162 	}
163 
164 	return 0;
165 }
166 
ci_handle_id_switch(struct ci_hdrc * ci)167 static void ci_handle_id_switch(struct ci_hdrc *ci)
168 {
169 	enum ci_role role;
170 
171 	mutex_lock(&ci->mutex);
172 	role = ci_otg_role(ci);
173 	if (role != ci->role) {
174 		dev_dbg(ci->dev, "switching from %s to %s\n",
175 			ci_role(ci)->name, ci->roles[role]->name);
176 
177 		if (ci->vbus_active && ci->role == CI_ROLE_GADGET)
178 			/*
179 			 * vbus disconnect event is lost due to role
180 			 * switch occurs during system suspend.
181 			 */
182 			usb_gadget_vbus_disconnect(&ci->gadget);
183 
184 		ci_role_stop(ci);
185 
186 		if (role == CI_ROLE_GADGET &&
187 				IS_ERR(ci->platdata->vbus_extcon.edev))
188 			/*
189 			 * Wait vbus lower than OTGSC_BSV before connecting
190 			 * to host. If connecting status is from an external
191 			 * connector instead of register, we don't need to
192 			 * care vbus on the board, since it will not affect
193 			 * external connector status.
194 			 */
195 			hw_wait_vbus_lower_bsv(ci);
196 
197 		ci_role_start(ci, role);
198 		/* vbus change may have already occurred */
199 		if (role == CI_ROLE_GADGET)
200 			ci_handle_vbus_change(ci);
201 	}
202 	mutex_unlock(&ci->mutex);
203 }
204 /**
205  * ci_otg_work - perform otg (vbus/id) event handle
206  * @work: work struct
207  */
ci_otg_work(struct work_struct * work)208 static void ci_otg_work(struct work_struct *work)
209 {
210 	struct ci_hdrc *ci = container_of(work, struct ci_hdrc, work);
211 
212 	if (ci_otg_is_fsm_mode(ci) && !ci_otg_fsm_work(ci)) {
213 		enable_irq(ci->irq);
214 		return;
215 	}
216 
217 	pm_runtime_get_sync(ci->dev);
218 
219 	if (ci->id_event) {
220 		ci->id_event = false;
221 		ci_handle_id_switch(ci);
222 	}
223 
224 	if (ci->b_sess_valid_event) {
225 		ci->b_sess_valid_event = false;
226 		ci_handle_vbus_change(ci);
227 	}
228 
229 	pm_runtime_put_sync(ci->dev);
230 
231 	enable_irq(ci->irq);
232 }
233 
234 
235 /**
236  * ci_hdrc_otg_init - initialize otg struct
237  * @ci: the controller
238  */
ci_hdrc_otg_init(struct ci_hdrc * ci)239 int ci_hdrc_otg_init(struct ci_hdrc *ci)
240 {
241 	INIT_WORK(&ci->work, ci_otg_work);
242 	ci->wq = create_freezable_workqueue("ci_otg");
243 	if (!ci->wq) {
244 		dev_err(ci->dev, "can't create workqueue\n");
245 		return -ENODEV;
246 	}
247 
248 	if (ci_otg_is_fsm_mode(ci))
249 		return ci_hdrc_otg_fsm_init(ci);
250 
251 	return 0;
252 }
253 
254 /**
255  * ci_hdrc_otg_destroy - destroy otg struct
256  * @ci: the controller
257  */
ci_hdrc_otg_destroy(struct ci_hdrc * ci)258 void ci_hdrc_otg_destroy(struct ci_hdrc *ci)
259 {
260 	if (ci->wq) {
261 		flush_workqueue(ci->wq);
262 		destroy_workqueue(ci->wq);
263 	}
264 	/* Disable all OTG irq and clear status */
265 	hw_write_otgsc(ci, OTGSC_INT_EN_BITS | OTGSC_INT_STATUS_BITS,
266 						OTGSC_INT_STATUS_BITS);
267 	if (ci_otg_is_fsm_mode(ci))
268 		ci_hdrc_otg_fsm_remove(ci);
269 }
270