1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2012 Invensense, Inc.
4 */
5
6 #include <linux/module.h>
7 #include <linux/slab.h>
8 #include <linux/i2c.h>
9 #include <linux/err.h>
10 #include <linux/delay.h>
11 #include <linux/sysfs.h>
12 #include <linux/jiffies.h>
13 #include <linux/irq.h>
14 #include <linux/interrupt.h>
15 #include <linux/iio/iio.h>
16 #include <linux/acpi.h>
17 #include <linux/platform_device.h>
18 #include <linux/regulator/consumer.h>
19 #include <linux/pm.h>
20 #include <linux/pm_runtime.h>
21 #include "inv_mpu_iio.h"
22 #include "inv_mpu_magn.h"
23
24 /*
25 * this is the gyro scale translated from dynamic range plus/minus
26 * {250, 500, 1000, 2000} to rad/s
27 */
28 static const int gyro_scale_6050[] = {133090, 266181, 532362, 1064724};
29
30 /*
31 * this is the accel scale translated from dynamic range plus/minus
32 * {2, 4, 8, 16} to m/s^2
33 */
34 static const int accel_scale[] = {598, 1196, 2392, 4785};
35
36 static const struct inv_mpu6050_reg_map reg_set_icm20602 = {
37 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV,
38 .lpf = INV_MPU6050_REG_CONFIG,
39 .accel_lpf = INV_MPU6500_REG_ACCEL_CONFIG_2,
40 .user_ctrl = INV_MPU6050_REG_USER_CTRL,
41 .fifo_en = INV_MPU6050_REG_FIFO_EN,
42 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG,
43 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG,
44 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H,
45 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W,
46 .raw_gyro = INV_MPU6050_REG_RAW_GYRO,
47 .raw_accl = INV_MPU6050_REG_RAW_ACCEL,
48 .temperature = INV_MPU6050_REG_TEMPERATURE,
49 .int_enable = INV_MPU6050_REG_INT_ENABLE,
50 .int_status = INV_MPU6050_REG_INT_STATUS,
51 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1,
52 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2,
53 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG,
54 .accl_offset = INV_MPU6500_REG_ACCEL_OFFSET,
55 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET,
56 .i2c_if = INV_ICM20602_REG_I2C_IF,
57 };
58
59 static const struct inv_mpu6050_reg_map reg_set_6500 = {
60 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV,
61 .lpf = INV_MPU6050_REG_CONFIG,
62 .accel_lpf = INV_MPU6500_REG_ACCEL_CONFIG_2,
63 .user_ctrl = INV_MPU6050_REG_USER_CTRL,
64 .fifo_en = INV_MPU6050_REG_FIFO_EN,
65 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG,
66 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG,
67 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H,
68 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W,
69 .raw_gyro = INV_MPU6050_REG_RAW_GYRO,
70 .raw_accl = INV_MPU6050_REG_RAW_ACCEL,
71 .temperature = INV_MPU6050_REG_TEMPERATURE,
72 .int_enable = INV_MPU6050_REG_INT_ENABLE,
73 .int_status = INV_MPU6050_REG_INT_STATUS,
74 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1,
75 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2,
76 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG,
77 .accl_offset = INV_MPU6500_REG_ACCEL_OFFSET,
78 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET,
79 .i2c_if = 0,
80 };
81
82 static const struct inv_mpu6050_reg_map reg_set_6050 = {
83 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV,
84 .lpf = INV_MPU6050_REG_CONFIG,
85 .user_ctrl = INV_MPU6050_REG_USER_CTRL,
86 .fifo_en = INV_MPU6050_REG_FIFO_EN,
87 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG,
88 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG,
89 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H,
90 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W,
91 .raw_gyro = INV_MPU6050_REG_RAW_GYRO,
92 .raw_accl = INV_MPU6050_REG_RAW_ACCEL,
93 .temperature = INV_MPU6050_REG_TEMPERATURE,
94 .int_enable = INV_MPU6050_REG_INT_ENABLE,
95 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1,
96 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2,
97 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG,
98 .accl_offset = INV_MPU6050_REG_ACCEL_OFFSET,
99 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET,
100 .i2c_if = 0,
101 };
102
103 static const struct inv_mpu6050_chip_config chip_config_6050 = {
104 .clk = INV_CLK_INTERNAL,
105 .fsr = INV_MPU6050_FSR_2000DPS,
106 .lpf = INV_MPU6050_FILTER_20HZ,
107 .divider = INV_MPU6050_FIFO_RATE_TO_DIVIDER(50),
108 .gyro_en = true,
109 .accl_en = true,
110 .temp_en = true,
111 .magn_en = false,
112 .gyro_fifo_enable = false,
113 .accl_fifo_enable = false,
114 .temp_fifo_enable = false,
115 .magn_fifo_enable = false,
116 .accl_fs = INV_MPU6050_FS_02G,
117 .user_ctrl = 0,
118 };
119
120 static const struct inv_mpu6050_chip_config chip_config_6500 = {
121 .clk = INV_CLK_PLL,
122 .fsr = INV_MPU6050_FSR_2000DPS,
123 .lpf = INV_MPU6050_FILTER_20HZ,
124 .divider = INV_MPU6050_FIFO_RATE_TO_DIVIDER(50),
125 .gyro_en = true,
126 .accl_en = true,
127 .temp_en = true,
128 .magn_en = false,
129 .gyro_fifo_enable = false,
130 .accl_fifo_enable = false,
131 .temp_fifo_enable = false,
132 .magn_fifo_enable = false,
133 .accl_fs = INV_MPU6050_FS_02G,
134 .user_ctrl = 0,
135 };
136
137 /* Indexed by enum inv_devices */
138 static const struct inv_mpu6050_hw hw_info[] = {
139 {
140 .whoami = INV_MPU6050_WHOAMI_VALUE,
141 .name = "MPU6050",
142 .reg = ®_set_6050,
143 .config = &chip_config_6050,
144 .fifo_size = 1024,
145 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE},
146 },
147 {
148 .whoami = INV_MPU6500_WHOAMI_VALUE,
149 .name = "MPU6500",
150 .reg = ®_set_6500,
151 .config = &chip_config_6500,
152 .fifo_size = 512,
153 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
154 },
155 {
156 .whoami = INV_MPU6515_WHOAMI_VALUE,
157 .name = "MPU6515",
158 .reg = ®_set_6500,
159 .config = &chip_config_6500,
160 .fifo_size = 512,
161 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
162 },
163 {
164 .whoami = INV_MPU6000_WHOAMI_VALUE,
165 .name = "MPU6000",
166 .reg = ®_set_6050,
167 .config = &chip_config_6050,
168 .fifo_size = 1024,
169 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE},
170 },
171 {
172 .whoami = INV_MPU9150_WHOAMI_VALUE,
173 .name = "MPU9150",
174 .reg = ®_set_6050,
175 .config = &chip_config_6050,
176 .fifo_size = 1024,
177 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE},
178 },
179 {
180 .whoami = INV_MPU9250_WHOAMI_VALUE,
181 .name = "MPU9250",
182 .reg = ®_set_6500,
183 .config = &chip_config_6500,
184 .fifo_size = 512,
185 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
186 },
187 {
188 .whoami = INV_MPU9255_WHOAMI_VALUE,
189 .name = "MPU9255",
190 .reg = ®_set_6500,
191 .config = &chip_config_6500,
192 .fifo_size = 512,
193 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE},
194 },
195 {
196 .whoami = INV_ICM20608_WHOAMI_VALUE,
197 .name = "ICM20608",
198 .reg = ®_set_6500,
199 .config = &chip_config_6500,
200 .fifo_size = 512,
201 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
202 },
203 {
204 .whoami = INV_ICM20609_WHOAMI_VALUE,
205 .name = "ICM20609",
206 .reg = ®_set_6500,
207 .config = &chip_config_6500,
208 .fifo_size = 4 * 1024,
209 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
210 },
211 {
212 .whoami = INV_ICM20689_WHOAMI_VALUE,
213 .name = "ICM20689",
214 .reg = ®_set_6500,
215 .config = &chip_config_6500,
216 .fifo_size = 4 * 1024,
217 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
218 },
219 {
220 .whoami = INV_ICM20602_WHOAMI_VALUE,
221 .name = "ICM20602",
222 .reg = ®_set_icm20602,
223 .config = &chip_config_6500,
224 .fifo_size = 1008,
225 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
226 },
227 {
228 .whoami = INV_ICM20690_WHOAMI_VALUE,
229 .name = "ICM20690",
230 .reg = ®_set_6500,
231 .config = &chip_config_6500,
232 .fifo_size = 1024,
233 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
234 },
235 {
236 .whoami = INV_IAM20680_WHOAMI_VALUE,
237 .name = "IAM20680",
238 .reg = ®_set_6500,
239 .config = &chip_config_6500,
240 .fifo_size = 512,
241 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE},
242 },
243 };
244
inv_mpu6050_pwr_mgmt_1_write(struct inv_mpu6050_state * st,bool sleep,int clock,int temp_dis)245 static int inv_mpu6050_pwr_mgmt_1_write(struct inv_mpu6050_state *st, bool sleep,
246 int clock, int temp_dis)
247 {
248 u8 val;
249
250 if (clock < 0)
251 clock = st->chip_config.clk;
252 if (temp_dis < 0)
253 temp_dis = !st->chip_config.temp_en;
254
255 val = clock & INV_MPU6050_BIT_CLK_MASK;
256 if (temp_dis)
257 val |= INV_MPU6050_BIT_TEMP_DIS;
258 if (sleep)
259 val |= INV_MPU6050_BIT_SLEEP;
260
261 dev_dbg(regmap_get_device(st->map), "pwr_mgmt_1: 0x%x\n", val);
262 return regmap_write(st->map, st->reg->pwr_mgmt_1, val);
263 }
264
inv_mpu6050_clock_switch(struct inv_mpu6050_state * st,unsigned int clock)265 static int inv_mpu6050_clock_switch(struct inv_mpu6050_state *st,
266 unsigned int clock)
267 {
268 int ret;
269
270 switch (st->chip_type) {
271 case INV_MPU6050:
272 case INV_MPU6000:
273 case INV_MPU9150:
274 /* old chips: switch clock manually */
275 ret = inv_mpu6050_pwr_mgmt_1_write(st, false, clock, -1);
276 if (ret)
277 return ret;
278 st->chip_config.clk = clock;
279 break;
280 default:
281 /* automatic clock switching, nothing to do */
282 break;
283 }
284
285 return 0;
286 }
287
inv_mpu6050_switch_engine(struct inv_mpu6050_state * st,bool en,unsigned int mask)288 int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en,
289 unsigned int mask)
290 {
291 unsigned int sleep;
292 u8 pwr_mgmt2, user_ctrl;
293 int ret;
294
295 /* delete useless requests */
296 if (mask & INV_MPU6050_SENSOR_ACCL && en == st->chip_config.accl_en)
297 mask &= ~INV_MPU6050_SENSOR_ACCL;
298 if (mask & INV_MPU6050_SENSOR_GYRO && en == st->chip_config.gyro_en)
299 mask &= ~INV_MPU6050_SENSOR_GYRO;
300 if (mask & INV_MPU6050_SENSOR_TEMP && en == st->chip_config.temp_en)
301 mask &= ~INV_MPU6050_SENSOR_TEMP;
302 if (mask & INV_MPU6050_SENSOR_MAGN && en == st->chip_config.magn_en)
303 mask &= ~INV_MPU6050_SENSOR_MAGN;
304 if (mask == 0)
305 return 0;
306
307 /* turn on/off temperature sensor */
308 if (mask & INV_MPU6050_SENSOR_TEMP) {
309 ret = inv_mpu6050_pwr_mgmt_1_write(st, false, -1, !en);
310 if (ret)
311 return ret;
312 st->chip_config.temp_en = en;
313 }
314
315 /* update user_crtl for driving magnetometer */
316 if (mask & INV_MPU6050_SENSOR_MAGN) {
317 user_ctrl = st->chip_config.user_ctrl;
318 if (en)
319 user_ctrl |= INV_MPU6050_BIT_I2C_MST_EN;
320 else
321 user_ctrl &= ~INV_MPU6050_BIT_I2C_MST_EN;
322 ret = regmap_write(st->map, st->reg->user_ctrl, user_ctrl);
323 if (ret)
324 return ret;
325 st->chip_config.user_ctrl = user_ctrl;
326 st->chip_config.magn_en = en;
327 }
328
329 /* manage accel & gyro engines */
330 if (mask & (INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO)) {
331 /* compute power management 2 current value */
332 pwr_mgmt2 = 0;
333 if (!st->chip_config.accl_en)
334 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_ACCL_STBY;
335 if (!st->chip_config.gyro_en)
336 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_GYRO_STBY;
337
338 /* update to new requested value */
339 if (mask & INV_MPU6050_SENSOR_ACCL) {
340 if (en)
341 pwr_mgmt2 &= ~INV_MPU6050_BIT_PWR_ACCL_STBY;
342 else
343 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_ACCL_STBY;
344 }
345 if (mask & INV_MPU6050_SENSOR_GYRO) {
346 if (en)
347 pwr_mgmt2 &= ~INV_MPU6050_BIT_PWR_GYRO_STBY;
348 else
349 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_GYRO_STBY;
350 }
351
352 /* switch clock to internal when turning gyro off */
353 if (mask & INV_MPU6050_SENSOR_GYRO && !en) {
354 ret = inv_mpu6050_clock_switch(st, INV_CLK_INTERNAL);
355 if (ret)
356 return ret;
357 }
358
359 /* update sensors engine */
360 dev_dbg(regmap_get_device(st->map), "pwr_mgmt_2: 0x%x\n",
361 pwr_mgmt2);
362 ret = regmap_write(st->map, st->reg->pwr_mgmt_2, pwr_mgmt2);
363 if (ret)
364 return ret;
365 if (mask & INV_MPU6050_SENSOR_ACCL)
366 st->chip_config.accl_en = en;
367 if (mask & INV_MPU6050_SENSOR_GYRO)
368 st->chip_config.gyro_en = en;
369
370 /* compute required time to have sensors stabilized */
371 sleep = 0;
372 if (en) {
373 if (mask & INV_MPU6050_SENSOR_ACCL) {
374 if (sleep < INV_MPU6050_ACCEL_UP_TIME)
375 sleep = INV_MPU6050_ACCEL_UP_TIME;
376 }
377 if (mask & INV_MPU6050_SENSOR_GYRO) {
378 if (sleep < INV_MPU6050_GYRO_UP_TIME)
379 sleep = INV_MPU6050_GYRO_UP_TIME;
380 }
381 } else {
382 if (mask & INV_MPU6050_SENSOR_GYRO) {
383 if (sleep < INV_MPU6050_GYRO_DOWN_TIME)
384 sleep = INV_MPU6050_GYRO_DOWN_TIME;
385 }
386 }
387 if (sleep)
388 msleep(sleep);
389
390 /* switch clock to PLL when turning gyro on */
391 if (mask & INV_MPU6050_SENSOR_GYRO && en) {
392 ret = inv_mpu6050_clock_switch(st, INV_CLK_PLL);
393 if (ret)
394 return ret;
395 }
396 }
397
398 return 0;
399 }
400
inv_mpu6050_set_power_itg(struct inv_mpu6050_state * st,bool power_on)401 static int inv_mpu6050_set_power_itg(struct inv_mpu6050_state *st,
402 bool power_on)
403 {
404 int result;
405
406 result = inv_mpu6050_pwr_mgmt_1_write(st, !power_on, -1, -1);
407 if (result)
408 return result;
409
410 if (power_on)
411 usleep_range(INV_MPU6050_REG_UP_TIME_MIN,
412 INV_MPU6050_REG_UP_TIME_MAX);
413
414 return 0;
415 }
416
inv_mpu6050_set_gyro_fsr(struct inv_mpu6050_state * st,enum inv_mpu6050_fsr_e val)417 static int inv_mpu6050_set_gyro_fsr(struct inv_mpu6050_state *st,
418 enum inv_mpu6050_fsr_e val)
419 {
420 unsigned int gyro_shift;
421 u8 data;
422
423 switch (st->chip_type) {
424 case INV_ICM20690:
425 gyro_shift = INV_ICM20690_GYRO_CONFIG_FSR_SHIFT;
426 break;
427 default:
428 gyro_shift = INV_MPU6050_GYRO_CONFIG_FSR_SHIFT;
429 break;
430 }
431
432 data = val << gyro_shift;
433 return regmap_write(st->map, st->reg->gyro_config, data);
434 }
435
436 /*
437 * inv_mpu6050_set_lpf_regs() - set low pass filter registers, chip dependent
438 *
439 * MPU60xx/MPU9150 use only 1 register for accelerometer + gyroscope
440 * MPU6500 and above have a dedicated register for accelerometer
441 */
inv_mpu6050_set_lpf_regs(struct inv_mpu6050_state * st,enum inv_mpu6050_filter_e val)442 static int inv_mpu6050_set_lpf_regs(struct inv_mpu6050_state *st,
443 enum inv_mpu6050_filter_e val)
444 {
445 int result;
446
447 result = regmap_write(st->map, st->reg->lpf, val);
448 if (result)
449 return result;
450
451 /* set accel lpf */
452 switch (st->chip_type) {
453 case INV_MPU6050:
454 case INV_MPU6000:
455 case INV_MPU9150:
456 /* old chips, nothing to do */
457 return 0;
458 case INV_ICM20689:
459 case INV_ICM20690:
460 /* set FIFO size to maximum value */
461 val |= INV_ICM20689_BITS_FIFO_SIZE_MAX;
462 break;
463 default:
464 break;
465 }
466
467 return regmap_write(st->map, st->reg->accel_lpf, val);
468 }
469
470 /*
471 * inv_mpu6050_init_config() - Initialize hardware, disable FIFO.
472 *
473 * Initial configuration:
474 * FSR: ± 2000DPS
475 * DLPF: 20Hz
476 * FIFO rate: 50Hz
477 * Clock source: Gyro PLL
478 */
inv_mpu6050_init_config(struct iio_dev * indio_dev)479 static int inv_mpu6050_init_config(struct iio_dev *indio_dev)
480 {
481 int result;
482 u8 d;
483 struct inv_mpu6050_state *st = iio_priv(indio_dev);
484
485 result = inv_mpu6050_set_gyro_fsr(st, st->chip_config.fsr);
486 if (result)
487 return result;
488
489 result = inv_mpu6050_set_lpf_regs(st, st->chip_config.lpf);
490 if (result)
491 return result;
492
493 d = st->chip_config.divider;
494 result = regmap_write(st->map, st->reg->sample_rate_div, d);
495 if (result)
496 return result;
497
498 d = (st->chip_config.accl_fs << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);
499 result = regmap_write(st->map, st->reg->accl_config, d);
500 if (result)
501 return result;
502
503 result = regmap_write(st->map, st->reg->int_pin_cfg, st->irq_mask);
504 if (result)
505 return result;
506
507 /*
508 * Internal chip period is 1ms (1kHz).
509 * Let's use at the beginning the theorical value before measuring
510 * with interrupt timestamps.
511 */
512 st->chip_period = NSEC_PER_MSEC;
513
514 /* magn chip init, noop if not present in the chip */
515 result = inv_mpu_magn_probe(st);
516 if (result)
517 return result;
518
519 return 0;
520 }
521
inv_mpu6050_sensor_set(struct inv_mpu6050_state * st,int reg,int axis,int val)522 static int inv_mpu6050_sensor_set(struct inv_mpu6050_state *st, int reg,
523 int axis, int val)
524 {
525 int ind, result;
526 __be16 d = cpu_to_be16(val);
527
528 ind = (axis - IIO_MOD_X) * 2;
529 result = regmap_bulk_write(st->map, reg + ind, &d, sizeof(d));
530 if (result)
531 return -EINVAL;
532
533 return 0;
534 }
535
inv_mpu6050_sensor_show(struct inv_mpu6050_state * st,int reg,int axis,int * val)536 static int inv_mpu6050_sensor_show(struct inv_mpu6050_state *st, int reg,
537 int axis, int *val)
538 {
539 int ind, result;
540 __be16 d;
541
542 ind = (axis - IIO_MOD_X) * 2;
543 result = regmap_bulk_read(st->map, reg + ind, &d, sizeof(d));
544 if (result)
545 return -EINVAL;
546 *val = (short)be16_to_cpup(&d);
547
548 return IIO_VAL_INT;
549 }
550
inv_mpu6050_read_channel_data(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val)551 static int inv_mpu6050_read_channel_data(struct iio_dev *indio_dev,
552 struct iio_chan_spec const *chan,
553 int *val)
554 {
555 struct inv_mpu6050_state *st = iio_priv(indio_dev);
556 struct device *pdev = regmap_get_device(st->map);
557 unsigned int freq_hz, period_us, min_sleep_us, max_sleep_us;
558 int result;
559 int ret;
560
561 /* compute sample period */
562 freq_hz = INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider);
563 period_us = 1000000 / freq_hz;
564
565 result = pm_runtime_get_sync(pdev);
566 if (result < 0) {
567 pm_runtime_put_noidle(pdev);
568 return result;
569 }
570
571 switch (chan->type) {
572 case IIO_ANGL_VEL:
573 if (!st->chip_config.gyro_en) {
574 result = inv_mpu6050_switch_engine(st, true,
575 INV_MPU6050_SENSOR_GYRO);
576 if (result)
577 goto error_power_off;
578 /* need to wait 2 periods to have first valid sample */
579 min_sleep_us = 2 * period_us;
580 max_sleep_us = 2 * (period_us + period_us / 2);
581 usleep_range(min_sleep_us, max_sleep_us);
582 }
583 ret = inv_mpu6050_sensor_show(st, st->reg->raw_gyro,
584 chan->channel2, val);
585 break;
586 case IIO_ACCEL:
587 if (!st->chip_config.accl_en) {
588 result = inv_mpu6050_switch_engine(st, true,
589 INV_MPU6050_SENSOR_ACCL);
590 if (result)
591 goto error_power_off;
592 /* wait 1 period for first sample availability */
593 min_sleep_us = period_us;
594 max_sleep_us = period_us + period_us / 2;
595 usleep_range(min_sleep_us, max_sleep_us);
596 }
597 ret = inv_mpu6050_sensor_show(st, st->reg->raw_accl,
598 chan->channel2, val);
599 break;
600 case IIO_TEMP:
601 /* temperature sensor work only with accel and/or gyro */
602 if (!st->chip_config.accl_en && !st->chip_config.gyro_en) {
603 result = -EBUSY;
604 goto error_power_off;
605 }
606 if (!st->chip_config.temp_en) {
607 result = inv_mpu6050_switch_engine(st, true,
608 INV_MPU6050_SENSOR_TEMP);
609 if (result)
610 goto error_power_off;
611 /* wait 1 period for first sample availability */
612 min_sleep_us = period_us;
613 max_sleep_us = period_us + period_us / 2;
614 usleep_range(min_sleep_us, max_sleep_us);
615 }
616 ret = inv_mpu6050_sensor_show(st, st->reg->temperature,
617 IIO_MOD_X, val);
618 break;
619 case IIO_MAGN:
620 if (!st->chip_config.magn_en) {
621 result = inv_mpu6050_switch_engine(st, true,
622 INV_MPU6050_SENSOR_MAGN);
623 if (result)
624 goto error_power_off;
625 /* frequency is limited for magnetometer */
626 if (freq_hz > INV_MPU_MAGN_FREQ_HZ_MAX) {
627 freq_hz = INV_MPU_MAGN_FREQ_HZ_MAX;
628 period_us = 1000000 / freq_hz;
629 }
630 /* need to wait 2 periods to have first valid sample */
631 min_sleep_us = 2 * period_us;
632 max_sleep_us = 2 * (period_us + period_us / 2);
633 usleep_range(min_sleep_us, max_sleep_us);
634 }
635 ret = inv_mpu_magn_read(st, chan->channel2, val);
636 break;
637 default:
638 ret = -EINVAL;
639 break;
640 }
641
642 pm_runtime_mark_last_busy(pdev);
643 pm_runtime_put_autosuspend(pdev);
644
645 return ret;
646
647 error_power_off:
648 pm_runtime_put_autosuspend(pdev);
649 return result;
650 }
651
652 static int
inv_mpu6050_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long mask)653 inv_mpu6050_read_raw(struct iio_dev *indio_dev,
654 struct iio_chan_spec const *chan,
655 int *val, int *val2, long mask)
656 {
657 struct inv_mpu6050_state *st = iio_priv(indio_dev);
658 int ret = 0;
659
660 switch (mask) {
661 case IIO_CHAN_INFO_RAW:
662 ret = iio_device_claim_direct_mode(indio_dev);
663 if (ret)
664 return ret;
665 mutex_lock(&st->lock);
666 ret = inv_mpu6050_read_channel_data(indio_dev, chan, val);
667 mutex_unlock(&st->lock);
668 iio_device_release_direct_mode(indio_dev);
669 return ret;
670 case IIO_CHAN_INFO_SCALE:
671 switch (chan->type) {
672 case IIO_ANGL_VEL:
673 mutex_lock(&st->lock);
674 *val = 0;
675 *val2 = gyro_scale_6050[st->chip_config.fsr];
676 mutex_unlock(&st->lock);
677
678 return IIO_VAL_INT_PLUS_NANO;
679 case IIO_ACCEL:
680 mutex_lock(&st->lock);
681 *val = 0;
682 *val2 = accel_scale[st->chip_config.accl_fs];
683 mutex_unlock(&st->lock);
684
685 return IIO_VAL_INT_PLUS_MICRO;
686 case IIO_TEMP:
687 *val = st->hw->temp.scale / 1000000;
688 *val2 = st->hw->temp.scale % 1000000;
689 return IIO_VAL_INT_PLUS_MICRO;
690 case IIO_MAGN:
691 return inv_mpu_magn_get_scale(st, chan, val, val2);
692 default:
693 return -EINVAL;
694 }
695 case IIO_CHAN_INFO_OFFSET:
696 switch (chan->type) {
697 case IIO_TEMP:
698 *val = st->hw->temp.offset;
699 return IIO_VAL_INT;
700 default:
701 return -EINVAL;
702 }
703 case IIO_CHAN_INFO_CALIBBIAS:
704 switch (chan->type) {
705 case IIO_ANGL_VEL:
706 mutex_lock(&st->lock);
707 ret = inv_mpu6050_sensor_show(st, st->reg->gyro_offset,
708 chan->channel2, val);
709 mutex_unlock(&st->lock);
710 return ret;
711 case IIO_ACCEL:
712 mutex_lock(&st->lock);
713 ret = inv_mpu6050_sensor_show(st, st->reg->accl_offset,
714 chan->channel2, val);
715 mutex_unlock(&st->lock);
716 return ret;
717
718 default:
719 return -EINVAL;
720 }
721 default:
722 return -EINVAL;
723 }
724 }
725
inv_mpu6050_write_gyro_scale(struct inv_mpu6050_state * st,int val,int val2)726 static int inv_mpu6050_write_gyro_scale(struct inv_mpu6050_state *st, int val,
727 int val2)
728 {
729 int result, i;
730
731 if (val != 0)
732 return -EINVAL;
733
734 for (i = 0; i < ARRAY_SIZE(gyro_scale_6050); ++i) {
735 if (gyro_scale_6050[i] == val2) {
736 result = inv_mpu6050_set_gyro_fsr(st, i);
737 if (result)
738 return result;
739
740 st->chip_config.fsr = i;
741 return 0;
742 }
743 }
744
745 return -EINVAL;
746 }
747
inv_write_raw_get_fmt(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,long mask)748 static int inv_write_raw_get_fmt(struct iio_dev *indio_dev,
749 struct iio_chan_spec const *chan, long mask)
750 {
751 switch (mask) {
752 case IIO_CHAN_INFO_SCALE:
753 switch (chan->type) {
754 case IIO_ANGL_VEL:
755 return IIO_VAL_INT_PLUS_NANO;
756 default:
757 return IIO_VAL_INT_PLUS_MICRO;
758 }
759 default:
760 return IIO_VAL_INT_PLUS_MICRO;
761 }
762
763 return -EINVAL;
764 }
765
inv_mpu6050_write_accel_scale(struct inv_mpu6050_state * st,int val,int val2)766 static int inv_mpu6050_write_accel_scale(struct inv_mpu6050_state *st, int val,
767 int val2)
768 {
769 int result, i;
770 u8 d;
771
772 if (val != 0)
773 return -EINVAL;
774
775 for (i = 0; i < ARRAY_SIZE(accel_scale); ++i) {
776 if (accel_scale[i] == val2) {
777 d = (i << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);
778 result = regmap_write(st->map, st->reg->accl_config, d);
779 if (result)
780 return result;
781
782 st->chip_config.accl_fs = i;
783 return 0;
784 }
785 }
786
787 return -EINVAL;
788 }
789
inv_mpu6050_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)790 static int inv_mpu6050_write_raw(struct iio_dev *indio_dev,
791 struct iio_chan_spec const *chan,
792 int val, int val2, long mask)
793 {
794 struct inv_mpu6050_state *st = iio_priv(indio_dev);
795 struct device *pdev = regmap_get_device(st->map);
796 int result;
797
798 /*
799 * we should only update scale when the chip is disabled, i.e.
800 * not running
801 */
802 result = iio_device_claim_direct_mode(indio_dev);
803 if (result)
804 return result;
805
806 mutex_lock(&st->lock);
807 result = pm_runtime_get_sync(pdev);
808 if (result < 0) {
809 pm_runtime_put_noidle(pdev);
810 goto error_write_raw_unlock;
811 }
812
813 switch (mask) {
814 case IIO_CHAN_INFO_SCALE:
815 switch (chan->type) {
816 case IIO_ANGL_VEL:
817 result = inv_mpu6050_write_gyro_scale(st, val, val2);
818 break;
819 case IIO_ACCEL:
820 result = inv_mpu6050_write_accel_scale(st, val, val2);
821 break;
822 default:
823 result = -EINVAL;
824 break;
825 }
826 break;
827 case IIO_CHAN_INFO_CALIBBIAS:
828 switch (chan->type) {
829 case IIO_ANGL_VEL:
830 result = inv_mpu6050_sensor_set(st,
831 st->reg->gyro_offset,
832 chan->channel2, val);
833 break;
834 case IIO_ACCEL:
835 result = inv_mpu6050_sensor_set(st,
836 st->reg->accl_offset,
837 chan->channel2, val);
838 break;
839 default:
840 result = -EINVAL;
841 break;
842 }
843 break;
844 default:
845 result = -EINVAL;
846 break;
847 }
848
849 pm_runtime_mark_last_busy(pdev);
850 pm_runtime_put_autosuspend(pdev);
851 error_write_raw_unlock:
852 mutex_unlock(&st->lock);
853 iio_device_release_direct_mode(indio_dev);
854
855 return result;
856 }
857
858 /*
859 * inv_mpu6050_set_lpf() - set low pass filer based on fifo rate.
860 *
861 * Based on the Nyquist principle, the bandwidth of the low
862 * pass filter must not exceed the signal sampling rate divided
863 * by 2, or there would be aliasing.
864 * This function basically search for the correct low pass
865 * parameters based on the fifo rate, e.g, sampling frequency.
866 *
867 * lpf is set automatically when setting sampling rate to avoid any aliases.
868 */
inv_mpu6050_set_lpf(struct inv_mpu6050_state * st,int rate)869 static int inv_mpu6050_set_lpf(struct inv_mpu6050_state *st, int rate)
870 {
871 static const int hz[] = {400, 200, 90, 40, 20, 10};
872 static const int d[] = {
873 INV_MPU6050_FILTER_200HZ, INV_MPU6050_FILTER_100HZ,
874 INV_MPU6050_FILTER_45HZ, INV_MPU6050_FILTER_20HZ,
875 INV_MPU6050_FILTER_10HZ, INV_MPU6050_FILTER_5HZ
876 };
877 int i, result;
878 u8 data;
879
880 data = INV_MPU6050_FILTER_5HZ;
881 for (i = 0; i < ARRAY_SIZE(hz); ++i) {
882 if (rate >= hz[i]) {
883 data = d[i];
884 break;
885 }
886 }
887 result = inv_mpu6050_set_lpf_regs(st, data);
888 if (result)
889 return result;
890 st->chip_config.lpf = data;
891
892 return 0;
893 }
894
895 /*
896 * inv_mpu6050_fifo_rate_store() - Set fifo rate.
897 */
898 static ssize_t
inv_mpu6050_fifo_rate_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)899 inv_mpu6050_fifo_rate_store(struct device *dev, struct device_attribute *attr,
900 const char *buf, size_t count)
901 {
902 int fifo_rate;
903 u8 d;
904 int result;
905 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
906 struct inv_mpu6050_state *st = iio_priv(indio_dev);
907 struct device *pdev = regmap_get_device(st->map);
908
909 if (kstrtoint(buf, 10, &fifo_rate))
910 return -EINVAL;
911 if (fifo_rate < INV_MPU6050_MIN_FIFO_RATE ||
912 fifo_rate > INV_MPU6050_MAX_FIFO_RATE)
913 return -EINVAL;
914
915 /* compute the chip sample rate divider */
916 d = INV_MPU6050_FIFO_RATE_TO_DIVIDER(fifo_rate);
917 /* compute back the fifo rate to handle truncation cases */
918 fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(d);
919
920 mutex_lock(&st->lock);
921 if (d == st->chip_config.divider) {
922 result = 0;
923 goto fifo_rate_fail_unlock;
924 }
925 result = pm_runtime_get_sync(pdev);
926 if (result < 0) {
927 pm_runtime_put_noidle(pdev);
928 goto fifo_rate_fail_unlock;
929 }
930
931 result = regmap_write(st->map, st->reg->sample_rate_div, d);
932 if (result)
933 goto fifo_rate_fail_power_off;
934 st->chip_config.divider = d;
935
936 result = inv_mpu6050_set_lpf(st, fifo_rate);
937 if (result)
938 goto fifo_rate_fail_power_off;
939
940 /* update rate for magn, noop if not present in chip */
941 result = inv_mpu_magn_set_rate(st, fifo_rate);
942 if (result)
943 goto fifo_rate_fail_power_off;
944
945 pm_runtime_mark_last_busy(pdev);
946 fifo_rate_fail_power_off:
947 pm_runtime_put_autosuspend(pdev);
948 fifo_rate_fail_unlock:
949 mutex_unlock(&st->lock);
950 if (result)
951 return result;
952
953 return count;
954 }
955
956 /*
957 * inv_fifo_rate_show() - Get the current sampling rate.
958 */
959 static ssize_t
inv_fifo_rate_show(struct device * dev,struct device_attribute * attr,char * buf)960 inv_fifo_rate_show(struct device *dev, struct device_attribute *attr,
961 char *buf)
962 {
963 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev));
964 unsigned fifo_rate;
965
966 mutex_lock(&st->lock);
967 fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider);
968 mutex_unlock(&st->lock);
969
970 return scnprintf(buf, PAGE_SIZE, "%u\n", fifo_rate);
971 }
972
973 /*
974 * inv_attr_show() - calling this function will show current
975 * parameters.
976 *
977 * Deprecated in favor of IIO mounting matrix API.
978 *
979 * See inv_get_mount_matrix()
980 */
inv_attr_show(struct device * dev,struct device_attribute * attr,char * buf)981 static ssize_t inv_attr_show(struct device *dev, struct device_attribute *attr,
982 char *buf)
983 {
984 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev));
985 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
986 s8 *m;
987
988 switch (this_attr->address) {
989 /*
990 * In MPU6050, the two matrix are the same because gyro and accel
991 * are integrated in one chip
992 */
993 case ATTR_GYRO_MATRIX:
994 case ATTR_ACCL_MATRIX:
995 m = st->plat_data.orientation;
996
997 return scnprintf(buf, PAGE_SIZE,
998 "%d, %d, %d; %d, %d, %d; %d, %d, %d\n",
999 m[0], m[1], m[2], m[3], m[4], m[5], m[6], m[7], m[8]);
1000 default:
1001 return -EINVAL;
1002 }
1003 }
1004
1005 /**
1006 * inv_mpu6050_validate_trigger() - validate_trigger callback for invensense
1007 * MPU6050 device.
1008 * @indio_dev: The IIO device
1009 * @trig: The new trigger
1010 *
1011 * Returns: 0 if the 'trig' matches the trigger registered by the MPU6050
1012 * device, -EINVAL otherwise.
1013 */
inv_mpu6050_validate_trigger(struct iio_dev * indio_dev,struct iio_trigger * trig)1014 static int inv_mpu6050_validate_trigger(struct iio_dev *indio_dev,
1015 struct iio_trigger *trig)
1016 {
1017 struct inv_mpu6050_state *st = iio_priv(indio_dev);
1018
1019 if (st->trig != trig)
1020 return -EINVAL;
1021
1022 return 0;
1023 }
1024
1025 static const struct iio_mount_matrix *
inv_get_mount_matrix(const struct iio_dev * indio_dev,const struct iio_chan_spec * chan)1026 inv_get_mount_matrix(const struct iio_dev *indio_dev,
1027 const struct iio_chan_spec *chan)
1028 {
1029 struct inv_mpu6050_state *data = iio_priv(indio_dev);
1030 const struct iio_mount_matrix *matrix;
1031
1032 if (chan->type == IIO_MAGN)
1033 matrix = &data->magn_orient;
1034 else
1035 matrix = &data->orientation;
1036
1037 return matrix;
1038 }
1039
1040 static const struct iio_chan_spec_ext_info inv_ext_info[] = {
1041 IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, inv_get_mount_matrix),
1042 { }
1043 };
1044
1045 #define INV_MPU6050_CHAN(_type, _channel2, _index) \
1046 { \
1047 .type = _type, \
1048 .modified = 1, \
1049 .channel2 = _channel2, \
1050 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
1051 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
1052 BIT(IIO_CHAN_INFO_CALIBBIAS), \
1053 .scan_index = _index, \
1054 .scan_type = { \
1055 .sign = 's', \
1056 .realbits = 16, \
1057 .storagebits = 16, \
1058 .shift = 0, \
1059 .endianness = IIO_BE, \
1060 }, \
1061 .ext_info = inv_ext_info, \
1062 }
1063
1064 #define INV_MPU6050_TEMP_CHAN(_index) \
1065 { \
1066 .type = IIO_TEMP, \
1067 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \
1068 | BIT(IIO_CHAN_INFO_OFFSET) \
1069 | BIT(IIO_CHAN_INFO_SCALE), \
1070 .scan_index = _index, \
1071 .scan_type = { \
1072 .sign = 's', \
1073 .realbits = 16, \
1074 .storagebits = 16, \
1075 .shift = 0, \
1076 .endianness = IIO_BE, \
1077 }, \
1078 }
1079
1080 static const struct iio_chan_spec inv_mpu_channels[] = {
1081 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU6050_SCAN_TIMESTAMP),
1082
1083 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP),
1084
1085 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
1086 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
1087 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
1088
1089 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
1090 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
1091 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
1092 };
1093
1094 #define INV_MPU6050_SCAN_MASK_3AXIS_ACCEL \
1095 (BIT(INV_MPU6050_SCAN_ACCL_X) \
1096 | BIT(INV_MPU6050_SCAN_ACCL_Y) \
1097 | BIT(INV_MPU6050_SCAN_ACCL_Z))
1098
1099 #define INV_MPU6050_SCAN_MASK_3AXIS_GYRO \
1100 (BIT(INV_MPU6050_SCAN_GYRO_X) \
1101 | BIT(INV_MPU6050_SCAN_GYRO_Y) \
1102 | BIT(INV_MPU6050_SCAN_GYRO_Z))
1103
1104 #define INV_MPU6050_SCAN_MASK_TEMP (BIT(INV_MPU6050_SCAN_TEMP))
1105
1106 static const unsigned long inv_mpu_scan_masks[] = {
1107 /* 3-axis accel */
1108 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL,
1109 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP,
1110 /* 3-axis gyro */
1111 INV_MPU6050_SCAN_MASK_3AXIS_GYRO,
1112 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP,
1113 /* 6-axis accel + gyro */
1114 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO,
1115 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
1116 | INV_MPU6050_SCAN_MASK_TEMP,
1117 0,
1118 };
1119
1120 #define INV_MPU9X50_MAGN_CHAN(_chan2, _bits, _index) \
1121 { \
1122 .type = IIO_MAGN, \
1123 .modified = 1, \
1124 .channel2 = _chan2, \
1125 .info_mask_separate = BIT(IIO_CHAN_INFO_SCALE) | \
1126 BIT(IIO_CHAN_INFO_RAW), \
1127 .scan_index = _index, \
1128 .scan_type = { \
1129 .sign = 's', \
1130 .realbits = _bits, \
1131 .storagebits = 16, \
1132 .shift = 0, \
1133 .endianness = IIO_BE, \
1134 }, \
1135 .ext_info = inv_ext_info, \
1136 }
1137
1138 static const struct iio_chan_spec inv_mpu9150_channels[] = {
1139 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU9X50_SCAN_TIMESTAMP),
1140
1141 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP),
1142
1143 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
1144 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
1145 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
1146
1147 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
1148 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
1149 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
1150
1151 /* Magnetometer resolution is 13 bits */
1152 INV_MPU9X50_MAGN_CHAN(IIO_MOD_X, 13, INV_MPU9X50_SCAN_MAGN_X),
1153 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Y, 13, INV_MPU9X50_SCAN_MAGN_Y),
1154 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Z, 13, INV_MPU9X50_SCAN_MAGN_Z),
1155 };
1156
1157 static const struct iio_chan_spec inv_mpu9250_channels[] = {
1158 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU9X50_SCAN_TIMESTAMP),
1159
1160 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP),
1161
1162 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
1163 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
1164 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
1165
1166 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
1167 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
1168 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
1169
1170 /* Magnetometer resolution is 16 bits */
1171 INV_MPU9X50_MAGN_CHAN(IIO_MOD_X, 16, INV_MPU9X50_SCAN_MAGN_X),
1172 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Y, 16, INV_MPU9X50_SCAN_MAGN_Y),
1173 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Z, 16, INV_MPU9X50_SCAN_MAGN_Z),
1174 };
1175
1176 #define INV_MPU9X50_SCAN_MASK_3AXIS_MAGN \
1177 (BIT(INV_MPU9X50_SCAN_MAGN_X) \
1178 | BIT(INV_MPU9X50_SCAN_MAGN_Y) \
1179 | BIT(INV_MPU9X50_SCAN_MAGN_Z))
1180
1181 static const unsigned long inv_mpu9x50_scan_masks[] = {
1182 /* 3-axis accel */
1183 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL,
1184 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP,
1185 /* 3-axis gyro */
1186 INV_MPU6050_SCAN_MASK_3AXIS_GYRO,
1187 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP,
1188 /* 3-axis magn */
1189 INV_MPU9X50_SCAN_MASK_3AXIS_MAGN,
1190 INV_MPU9X50_SCAN_MASK_3AXIS_MAGN | INV_MPU6050_SCAN_MASK_TEMP,
1191 /* 6-axis accel + gyro */
1192 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO,
1193 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
1194 | INV_MPU6050_SCAN_MASK_TEMP,
1195 /* 6-axis accel + magn */
1196 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN,
1197 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN
1198 | INV_MPU6050_SCAN_MASK_TEMP,
1199 /* 6-axis gyro + magn */
1200 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN,
1201 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN
1202 | INV_MPU6050_SCAN_MASK_TEMP,
1203 /* 9-axis accel + gyro + magn */
1204 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
1205 | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN,
1206 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
1207 | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN
1208 | INV_MPU6050_SCAN_MASK_TEMP,
1209 0,
1210 };
1211
1212 static const unsigned long inv_icm20602_scan_masks[] = {
1213 /* 3-axis accel + temp (mandatory) */
1214 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP,
1215 /* 3-axis gyro + temp (mandatory) */
1216 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP,
1217 /* 6-axis accel + gyro + temp (mandatory) */
1218 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO
1219 | INV_MPU6050_SCAN_MASK_TEMP,
1220 0,
1221 };
1222
1223 /*
1224 * The user can choose any frequency between INV_MPU6050_MIN_FIFO_RATE and
1225 * INV_MPU6050_MAX_FIFO_RATE, but only these frequencies are matched by the
1226 * low-pass filter. Specifically, each of these sampling rates are about twice
1227 * the bandwidth of a corresponding low-pass filter, which should eliminate
1228 * aliasing following the Nyquist principle. By picking a frequency different
1229 * from these, the user risks aliasing effects.
1230 */
1231 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("10 20 50 100 200 500");
1232 static IIO_CONST_ATTR(in_anglvel_scale_available,
1233 "0.000133090 0.000266181 0.000532362 0.001064724");
1234 static IIO_CONST_ATTR(in_accel_scale_available,
1235 "0.000598 0.001196 0.002392 0.004785");
1236 static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO | S_IWUSR, inv_fifo_rate_show,
1237 inv_mpu6050_fifo_rate_store);
1238
1239 /* Deprecated: kept for userspace backward compatibility. */
1240 static IIO_DEVICE_ATTR(in_gyro_matrix, S_IRUGO, inv_attr_show, NULL,
1241 ATTR_GYRO_MATRIX);
1242 static IIO_DEVICE_ATTR(in_accel_matrix, S_IRUGO, inv_attr_show, NULL,
1243 ATTR_ACCL_MATRIX);
1244
1245 static struct attribute *inv_attributes[] = {
1246 &iio_dev_attr_in_gyro_matrix.dev_attr.attr, /* deprecated */
1247 &iio_dev_attr_in_accel_matrix.dev_attr.attr, /* deprecated */
1248 &iio_dev_attr_sampling_frequency.dev_attr.attr,
1249 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
1250 &iio_const_attr_in_accel_scale_available.dev_attr.attr,
1251 &iio_const_attr_in_anglvel_scale_available.dev_attr.attr,
1252 NULL,
1253 };
1254
1255 static const struct attribute_group inv_attribute_group = {
1256 .attrs = inv_attributes
1257 };
1258
inv_mpu6050_reg_access(struct iio_dev * indio_dev,unsigned int reg,unsigned int writeval,unsigned int * readval)1259 static int inv_mpu6050_reg_access(struct iio_dev *indio_dev,
1260 unsigned int reg,
1261 unsigned int writeval,
1262 unsigned int *readval)
1263 {
1264 struct inv_mpu6050_state *st = iio_priv(indio_dev);
1265 int ret;
1266
1267 mutex_lock(&st->lock);
1268 if (readval)
1269 ret = regmap_read(st->map, reg, readval);
1270 else
1271 ret = regmap_write(st->map, reg, writeval);
1272 mutex_unlock(&st->lock);
1273
1274 return ret;
1275 }
1276
1277 static const struct iio_info mpu_info = {
1278 .read_raw = &inv_mpu6050_read_raw,
1279 .write_raw = &inv_mpu6050_write_raw,
1280 .write_raw_get_fmt = &inv_write_raw_get_fmt,
1281 .attrs = &inv_attribute_group,
1282 .validate_trigger = inv_mpu6050_validate_trigger,
1283 .debugfs_reg_access = &inv_mpu6050_reg_access,
1284 };
1285
1286 /*
1287 * inv_check_and_setup_chip() - check and setup chip.
1288 */
inv_check_and_setup_chip(struct inv_mpu6050_state * st)1289 static int inv_check_and_setup_chip(struct inv_mpu6050_state *st)
1290 {
1291 int result;
1292 unsigned int regval, mask;
1293 int i;
1294
1295 st->hw = &hw_info[st->chip_type];
1296 st->reg = hw_info[st->chip_type].reg;
1297 memcpy(&st->chip_config, hw_info[st->chip_type].config,
1298 sizeof(st->chip_config));
1299
1300 /* check chip self-identification */
1301 result = regmap_read(st->map, INV_MPU6050_REG_WHOAMI, ®val);
1302 if (result)
1303 return result;
1304 if (regval != st->hw->whoami) {
1305 /* check whoami against all possible values */
1306 for (i = 0; i < INV_NUM_PARTS; ++i) {
1307 if (regval == hw_info[i].whoami) {
1308 dev_warn(regmap_get_device(st->map),
1309 "whoami mismatch got %#02x (%s)"
1310 "expected %#02hhx (%s)\n",
1311 regval, hw_info[i].name,
1312 st->hw->whoami, st->hw->name);
1313 break;
1314 }
1315 }
1316 if (i >= INV_NUM_PARTS) {
1317 dev_err(regmap_get_device(st->map),
1318 "invalid whoami %#02x expected %#02hhx (%s)\n",
1319 regval, st->hw->whoami, st->hw->name);
1320 return -ENODEV;
1321 }
1322 }
1323
1324 /* reset to make sure previous state are not there */
1325 result = regmap_write(st->map, st->reg->pwr_mgmt_1,
1326 INV_MPU6050_BIT_H_RESET);
1327 if (result)
1328 return result;
1329 msleep(INV_MPU6050_POWER_UP_TIME);
1330 switch (st->chip_type) {
1331 case INV_MPU6000:
1332 case INV_MPU6500:
1333 case INV_MPU6515:
1334 case INV_MPU9250:
1335 case INV_MPU9255:
1336 /* reset signal path (required for spi connection) */
1337 regval = INV_MPU6050_BIT_TEMP_RST | INV_MPU6050_BIT_ACCEL_RST |
1338 INV_MPU6050_BIT_GYRO_RST;
1339 result = regmap_write(st->map, INV_MPU6050_REG_SIGNAL_PATH_RESET,
1340 regval);
1341 if (result)
1342 return result;
1343 msleep(INV_MPU6050_POWER_UP_TIME);
1344 break;
1345 default:
1346 break;
1347 }
1348
1349 /*
1350 * Turn power on. After reset, the sleep bit could be on
1351 * or off depending on the OTP settings. Turning power on
1352 * make it in a definite state as well as making the hardware
1353 * state align with the software state
1354 */
1355 result = inv_mpu6050_set_power_itg(st, true);
1356 if (result)
1357 return result;
1358 mask = INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO |
1359 INV_MPU6050_SENSOR_TEMP | INV_MPU6050_SENSOR_MAGN;
1360 result = inv_mpu6050_switch_engine(st, false, mask);
1361 if (result)
1362 goto error_power_off;
1363
1364 return 0;
1365
1366 error_power_off:
1367 inv_mpu6050_set_power_itg(st, false);
1368 return result;
1369 }
1370
inv_mpu_core_enable_regulator_vddio(struct inv_mpu6050_state * st)1371 static int inv_mpu_core_enable_regulator_vddio(struct inv_mpu6050_state *st)
1372 {
1373 int result;
1374
1375 result = regulator_enable(st->vddio_supply);
1376 if (result) {
1377 dev_err(regmap_get_device(st->map),
1378 "Failed to enable vddio regulator: %d\n", result);
1379 } else {
1380 /* Give the device a little bit of time to start up. */
1381 usleep_range(3000, 5000);
1382 }
1383
1384 return result;
1385 }
1386
inv_mpu_core_disable_regulator_vddio(struct inv_mpu6050_state * st)1387 static int inv_mpu_core_disable_regulator_vddio(struct inv_mpu6050_state *st)
1388 {
1389 int result;
1390
1391 result = regulator_disable(st->vddio_supply);
1392 if (result)
1393 dev_err(regmap_get_device(st->map),
1394 "Failed to disable vddio regulator: %d\n", result);
1395
1396 return result;
1397 }
1398
inv_mpu_core_disable_regulator_action(void * _data)1399 static void inv_mpu_core_disable_regulator_action(void *_data)
1400 {
1401 struct inv_mpu6050_state *st = _data;
1402 int result;
1403
1404 result = regulator_disable(st->vdd_supply);
1405 if (result)
1406 dev_err(regmap_get_device(st->map),
1407 "Failed to disable vdd regulator: %d\n", result);
1408
1409 inv_mpu_core_disable_regulator_vddio(st);
1410 }
1411
inv_mpu_pm_disable(void * data)1412 static void inv_mpu_pm_disable(void *data)
1413 {
1414 struct device *dev = data;
1415
1416 pm_runtime_put_sync_suspend(dev);
1417 pm_runtime_disable(dev);
1418 }
1419
inv_mpu_core_probe(struct regmap * regmap,int irq,const char * name,int (* inv_mpu_bus_setup)(struct iio_dev *),int chip_type)1420 int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name,
1421 int (*inv_mpu_bus_setup)(struct iio_dev *), int chip_type)
1422 {
1423 struct inv_mpu6050_state *st;
1424 struct iio_dev *indio_dev;
1425 struct inv_mpu6050_platform_data *pdata;
1426 struct device *dev = regmap_get_device(regmap);
1427 int result;
1428 struct irq_data *desc;
1429 int irq_type;
1430
1431 indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
1432 if (!indio_dev)
1433 return -ENOMEM;
1434
1435 BUILD_BUG_ON(ARRAY_SIZE(hw_info) != INV_NUM_PARTS);
1436 if (chip_type < 0 || chip_type >= INV_NUM_PARTS) {
1437 dev_err(dev, "Bad invensense chip_type=%d name=%s\n",
1438 chip_type, name);
1439 return -ENODEV;
1440 }
1441 st = iio_priv(indio_dev);
1442 mutex_init(&st->lock);
1443 st->chip_type = chip_type;
1444 st->irq = irq;
1445 st->map = regmap;
1446
1447 pdata = dev_get_platdata(dev);
1448 if (!pdata) {
1449 result = iio_read_mount_matrix(dev, "mount-matrix",
1450 &st->orientation);
1451 if (result) {
1452 dev_err(dev, "Failed to retrieve mounting matrix %d\n",
1453 result);
1454 return result;
1455 }
1456 } else {
1457 st->plat_data = *pdata;
1458 }
1459
1460 desc = irq_get_irq_data(irq);
1461 if (!desc) {
1462 dev_err(dev, "Could not find IRQ %d\n", irq);
1463 return -EINVAL;
1464 }
1465
1466 irq_type = irqd_get_trigger_type(desc);
1467 if (!irq_type)
1468 irq_type = IRQF_TRIGGER_RISING;
1469 if (irq_type & IRQF_TRIGGER_RISING) // rising or both-edge
1470 st->irq_mask = INV_MPU6050_ACTIVE_HIGH;
1471 else if (irq_type == IRQF_TRIGGER_FALLING)
1472 st->irq_mask = INV_MPU6050_ACTIVE_LOW;
1473 else if (irq_type == IRQF_TRIGGER_HIGH)
1474 st->irq_mask = INV_MPU6050_ACTIVE_HIGH |
1475 INV_MPU6050_LATCH_INT_EN;
1476 else if (irq_type == IRQF_TRIGGER_LOW)
1477 st->irq_mask = INV_MPU6050_ACTIVE_LOW |
1478 INV_MPU6050_LATCH_INT_EN;
1479 else {
1480 dev_err(dev, "Invalid interrupt type 0x%x specified\n",
1481 irq_type);
1482 return -EINVAL;
1483 }
1484
1485 st->vdd_supply = devm_regulator_get(dev, "vdd");
1486 if (IS_ERR(st->vdd_supply))
1487 return dev_err_probe(dev, PTR_ERR(st->vdd_supply),
1488 "Failed to get vdd regulator\n");
1489
1490 st->vddio_supply = devm_regulator_get(dev, "vddio");
1491 if (IS_ERR(st->vddio_supply))
1492 return dev_err_probe(dev, PTR_ERR(st->vddio_supply),
1493 "Failed to get vddio regulator\n");
1494
1495 result = regulator_enable(st->vdd_supply);
1496 if (result) {
1497 dev_err(dev, "Failed to enable vdd regulator: %d\n", result);
1498 return result;
1499 }
1500 msleep(INV_MPU6050_POWER_UP_TIME);
1501
1502 result = inv_mpu_core_enable_regulator_vddio(st);
1503 if (result) {
1504 regulator_disable(st->vdd_supply);
1505 return result;
1506 }
1507
1508 result = devm_add_action_or_reset(dev, inv_mpu_core_disable_regulator_action,
1509 st);
1510 if (result) {
1511 dev_err(dev, "Failed to setup regulator cleanup action %d\n",
1512 result);
1513 return result;
1514 }
1515
1516 /* fill magnetometer orientation */
1517 result = inv_mpu_magn_set_orient(st);
1518 if (result)
1519 return result;
1520
1521 /* power is turned on inside check chip type*/
1522 result = inv_check_and_setup_chip(st);
1523 if (result)
1524 return result;
1525
1526 result = inv_mpu6050_init_config(indio_dev);
1527 if (result) {
1528 dev_err(dev, "Could not initialize device.\n");
1529 goto error_power_off;
1530 }
1531
1532 dev_set_drvdata(dev, indio_dev);
1533 /* name will be NULL when enumerated via ACPI */
1534 if (name)
1535 indio_dev->name = name;
1536 else
1537 indio_dev->name = dev_name(dev);
1538
1539 /* requires parent device set in indio_dev */
1540 if (inv_mpu_bus_setup) {
1541 result = inv_mpu_bus_setup(indio_dev);
1542 if (result)
1543 goto error_power_off;
1544 }
1545
1546 /* chip init is done, turning on runtime power management */
1547 result = pm_runtime_set_active(dev);
1548 if (result)
1549 goto error_power_off;
1550 pm_runtime_get_noresume(dev);
1551 pm_runtime_enable(dev);
1552 pm_runtime_set_autosuspend_delay(dev, INV_MPU6050_SUSPEND_DELAY_MS);
1553 pm_runtime_use_autosuspend(dev);
1554 pm_runtime_put(dev);
1555 result = devm_add_action_or_reset(dev, inv_mpu_pm_disable, dev);
1556 if (result)
1557 return result;
1558
1559 switch (chip_type) {
1560 case INV_MPU9150:
1561 indio_dev->channels = inv_mpu9150_channels;
1562 indio_dev->num_channels = ARRAY_SIZE(inv_mpu9150_channels);
1563 indio_dev->available_scan_masks = inv_mpu9x50_scan_masks;
1564 break;
1565 case INV_MPU9250:
1566 case INV_MPU9255:
1567 indio_dev->channels = inv_mpu9250_channels;
1568 indio_dev->num_channels = ARRAY_SIZE(inv_mpu9250_channels);
1569 indio_dev->available_scan_masks = inv_mpu9x50_scan_masks;
1570 break;
1571 case INV_ICM20602:
1572 indio_dev->channels = inv_mpu_channels;
1573 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels);
1574 indio_dev->available_scan_masks = inv_icm20602_scan_masks;
1575 break;
1576 default:
1577 indio_dev->channels = inv_mpu_channels;
1578 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels);
1579 indio_dev->available_scan_masks = inv_mpu_scan_masks;
1580 break;
1581 }
1582 /*
1583 * Use magnetometer inside the chip only if there is no i2c
1584 * auxiliary device in use. Otherwise Going back to 6-axis only.
1585 */
1586 if (st->magn_disabled) {
1587 indio_dev->channels = inv_mpu_channels;
1588 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels);
1589 indio_dev->available_scan_masks = inv_mpu_scan_masks;
1590 }
1591
1592 indio_dev->info = &mpu_info;
1593 indio_dev->modes = INDIO_BUFFER_TRIGGERED;
1594
1595 result = devm_iio_triggered_buffer_setup(dev, indio_dev,
1596 iio_pollfunc_store_time,
1597 inv_mpu6050_read_fifo,
1598 NULL);
1599 if (result) {
1600 dev_err(dev, "configure buffer fail %d\n", result);
1601 return result;
1602 }
1603 result = inv_mpu6050_probe_trigger(indio_dev, irq_type);
1604 if (result) {
1605 dev_err(dev, "trigger probe fail %d\n", result);
1606 return result;
1607 }
1608
1609 result = devm_iio_device_register(dev, indio_dev);
1610 if (result) {
1611 dev_err(dev, "IIO register fail %d\n", result);
1612 return result;
1613 }
1614
1615 return 0;
1616
1617 error_power_off:
1618 inv_mpu6050_set_power_itg(st, false);
1619 return result;
1620 }
1621 EXPORT_SYMBOL_GPL(inv_mpu_core_probe);
1622
inv_mpu_resume(struct device * dev)1623 static int __maybe_unused inv_mpu_resume(struct device *dev)
1624 {
1625 struct iio_dev *indio_dev = dev_get_drvdata(dev);
1626 struct inv_mpu6050_state *st = iio_priv(indio_dev);
1627 int result;
1628
1629 mutex_lock(&st->lock);
1630 result = inv_mpu_core_enable_regulator_vddio(st);
1631 if (result)
1632 goto out_unlock;
1633
1634 result = inv_mpu6050_set_power_itg(st, true);
1635 if (result)
1636 goto out_unlock;
1637
1638 pm_runtime_disable(dev);
1639 pm_runtime_set_active(dev);
1640 pm_runtime_enable(dev);
1641
1642 result = inv_mpu6050_switch_engine(st, true, st->suspended_sensors);
1643 if (result)
1644 goto out_unlock;
1645
1646 if (iio_buffer_enabled(indio_dev))
1647 result = inv_mpu6050_prepare_fifo(st, true);
1648
1649 out_unlock:
1650 mutex_unlock(&st->lock);
1651
1652 return result;
1653 }
1654
inv_mpu_suspend(struct device * dev)1655 static int __maybe_unused inv_mpu_suspend(struct device *dev)
1656 {
1657 struct iio_dev *indio_dev = dev_get_drvdata(dev);
1658 struct inv_mpu6050_state *st = iio_priv(indio_dev);
1659 int result;
1660
1661 mutex_lock(&st->lock);
1662
1663 st->suspended_sensors = 0;
1664 if (pm_runtime_suspended(dev)) {
1665 result = 0;
1666 goto out_unlock;
1667 }
1668
1669 if (iio_buffer_enabled(indio_dev)) {
1670 result = inv_mpu6050_prepare_fifo(st, false);
1671 if (result)
1672 goto out_unlock;
1673 }
1674
1675 if (st->chip_config.accl_en)
1676 st->suspended_sensors |= INV_MPU6050_SENSOR_ACCL;
1677 if (st->chip_config.gyro_en)
1678 st->suspended_sensors |= INV_MPU6050_SENSOR_GYRO;
1679 if (st->chip_config.temp_en)
1680 st->suspended_sensors |= INV_MPU6050_SENSOR_TEMP;
1681 if (st->chip_config.magn_en)
1682 st->suspended_sensors |= INV_MPU6050_SENSOR_MAGN;
1683 result = inv_mpu6050_switch_engine(st, false, st->suspended_sensors);
1684 if (result)
1685 goto out_unlock;
1686
1687 result = inv_mpu6050_set_power_itg(st, false);
1688 if (result)
1689 goto out_unlock;
1690
1691 inv_mpu_core_disable_regulator_vddio(st);
1692 out_unlock:
1693 mutex_unlock(&st->lock);
1694
1695 return result;
1696 }
1697
inv_mpu_runtime_suspend(struct device * dev)1698 static int __maybe_unused inv_mpu_runtime_suspend(struct device *dev)
1699 {
1700 struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev));
1701 unsigned int sensors;
1702 int ret;
1703
1704 mutex_lock(&st->lock);
1705
1706 sensors = INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO |
1707 INV_MPU6050_SENSOR_TEMP | INV_MPU6050_SENSOR_MAGN;
1708 ret = inv_mpu6050_switch_engine(st, false, sensors);
1709 if (ret)
1710 goto out_unlock;
1711
1712 ret = inv_mpu6050_set_power_itg(st, false);
1713 if (ret)
1714 goto out_unlock;
1715
1716 inv_mpu_core_disable_regulator_vddio(st);
1717
1718 out_unlock:
1719 mutex_unlock(&st->lock);
1720 return ret;
1721 }
1722
inv_mpu_runtime_resume(struct device * dev)1723 static int __maybe_unused inv_mpu_runtime_resume(struct device *dev)
1724 {
1725 struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev));
1726 int ret;
1727
1728 ret = inv_mpu_core_enable_regulator_vddio(st);
1729 if (ret)
1730 return ret;
1731
1732 return inv_mpu6050_set_power_itg(st, true);
1733 }
1734
1735 const struct dev_pm_ops inv_mpu_pmops = {
1736 SET_SYSTEM_SLEEP_PM_OPS(inv_mpu_suspend, inv_mpu_resume)
1737 SET_RUNTIME_PM_OPS(inv_mpu_runtime_suspend, inv_mpu_runtime_resume, NULL)
1738 };
1739 EXPORT_SYMBOL_GPL(inv_mpu_pmops);
1740
1741 MODULE_AUTHOR("Invensense Corporation");
1742 MODULE_DESCRIPTION("Invensense device MPU6050 driver");
1743 MODULE_LICENSE("GPL");
1744