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Searched defs:mmMP1_SMN_IH_SW_INT (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/mp/
Dmp_12_0_0_offset.h328 #define mmMP1_SMN_IH_SW_INT … macro
Dmp_10_0_offset.h328 #define mmMP1_SMN_IH_SW_INT … macro
Dmp_9_0_offset.h342 #define mmMP1_SMN_IH_SW_INT 0x02c2 macro
Dmp_11_0_offset.h332 #define mmMP1_SMN_IH_SW_INT … macro