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Searched defs:mmSDMA1_RLC3_RB_WPTR_POLL_CNTL (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/sdma1/
Dsdma1_4_2_offset.h632 #define mmSDMA1_RLC3_RB_WPTR_POLL_CNTL macro
Dsdma1_4_2_2_offset.h636 #define mmSDMA1_RLC3_RB_WPTR_POLL_CNTL macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_1_0_offset.h1632 #define mmSDMA1_RLC3_RB_WPTR_POLL_CNTL macro
Dgc_10_3_0_offset.h1686 #define mmSDMA1_RLC3_RB_WPTR_POLL_CNTL macro