Home
last modified time | relevance | path

Searched defs:mmSDMA1_UTCL1_WATERMK (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/sdma1/
Dsdma1_4_0_offset.h128 #define mmSDMA1_UTCL1_WATERMK 0x003d macro
Dsdma1_4_2_offset.h128 #define mmSDMA1_UTCL1_WATERMK macro
Dsdma1_4_2_2_offset.h128 #define mmSDMA1_UTCL1_WATERMK macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_1_0_offset.h1110 #define mmSDMA1_UTCL1_WATERMK macro
Dgc_10_3_0_offset.h1150 #define mmSDMA1_UTCL1_WATERMK macro