1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * drivers/media/i2c/smiapp-pll.h 4 * 5 * Generic driver for SMIA/SMIA++ compliant camera modules 6 * 7 * Copyright (C) 2012 Nokia Corporation 8 * Contact: Sakari Ailus <sakari.ailus@iki.fi> 9 */ 10 11 #ifndef SMIAPP_PLL_H 12 #define SMIAPP_PLL_H 13 14 /* CSI-2 or CCP-2 */ 15 #define SMIAPP_PLL_BUS_TYPE_CSI2 0x00 16 #define SMIAPP_PLL_BUS_TYPE_PARALLEL 0x01 17 18 /* op pix clock is for all lanes in total normally */ 19 #define SMIAPP_PLL_FLAG_OP_PIX_CLOCK_PER_LANE (1 << 0) 20 #define SMIAPP_PLL_FLAG_NO_OP_CLOCKS (1 << 1) 21 22 struct smiapp_pll_branch { 23 uint16_t sys_clk_div; 24 uint16_t pix_clk_div; 25 uint32_t sys_clk_freq_hz; 26 uint32_t pix_clk_freq_hz; 27 }; 28 29 struct smiapp_pll { 30 /* input values */ 31 uint8_t bus_type; 32 union { 33 struct { 34 uint8_t lanes; 35 } csi2; 36 struct { 37 uint8_t bus_width; 38 } parallel; 39 }; 40 unsigned long flags; 41 uint8_t binning_horizontal; 42 uint8_t binning_vertical; 43 uint8_t scale_m; 44 uint8_t scale_n; 45 uint8_t bits_per_pixel; 46 uint32_t link_freq; 47 uint32_t ext_clk_freq_hz; 48 49 /* output values */ 50 uint16_t pre_pll_clk_div; 51 uint16_t pll_multiplier; 52 uint32_t pll_ip_clk_freq_hz; 53 uint32_t pll_op_clk_freq_hz; 54 struct smiapp_pll_branch vt; 55 struct smiapp_pll_branch op; 56 57 uint32_t pixel_rate_csi; 58 uint32_t pixel_rate_pixel_array; 59 }; 60 61 struct smiapp_pll_branch_limits { 62 uint16_t min_sys_clk_div; 63 uint16_t max_sys_clk_div; 64 uint32_t min_sys_clk_freq_hz; 65 uint32_t max_sys_clk_freq_hz; 66 uint16_t min_pix_clk_div; 67 uint16_t max_pix_clk_div; 68 uint32_t min_pix_clk_freq_hz; 69 uint32_t max_pix_clk_freq_hz; 70 }; 71 72 struct smiapp_pll_limits { 73 /* Strict PLL limits */ 74 uint32_t min_ext_clk_freq_hz; 75 uint32_t max_ext_clk_freq_hz; 76 uint16_t min_pre_pll_clk_div; 77 uint16_t max_pre_pll_clk_div; 78 uint32_t min_pll_ip_freq_hz; 79 uint32_t max_pll_ip_freq_hz; 80 uint16_t min_pll_multiplier; 81 uint16_t max_pll_multiplier; 82 uint32_t min_pll_op_freq_hz; 83 uint32_t max_pll_op_freq_hz; 84 85 struct smiapp_pll_branch_limits vt; 86 struct smiapp_pll_branch_limits op; 87 88 /* Other relevant limits */ 89 uint32_t min_line_length_pck_bin; 90 uint32_t min_line_length_pck; 91 }; 92 93 struct device; 94 95 int smiapp_pll_calculate(struct device *dev, 96 const struct smiapp_pll_limits *limits, 97 struct smiapp_pll *pll); 98 99 #endif /* SMIAPP_PLL_H */ 100