1 /*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2017-2020 Broadcom. All Rights Reserved. The term *
5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. *
6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
7 * EMULEX and SLI are trademarks of Emulex. *
8 * www.broadcom.com *
9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
10 * *
11 * This program is free software; you can redistribute it and/or *
12 * modify it under the terms of version 2 of the GNU General *
13 * Public License as published by the Free Software Foundation. *
14 * This program is distributed in the hope that it will be useful. *
15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
20 * more details, a copy of which can be found in the file COPYING *
21 * included with this package. *
22 *******************************************************************/
23
24 #include <scsi/scsi_host.h>
25 #include <linux/ktime.h>
26 #include <linux/workqueue.h>
27
28 #if defined(CONFIG_DEBUG_FS) && !defined(CONFIG_SCSI_LPFC_DEBUG_FS)
29 #define CONFIG_SCSI_LPFC_DEBUG_FS
30 #endif
31
32 struct lpfc_sli2_slim;
33
34 #define ELX_MODEL_NAME_SIZE 80
35 #define ELX_FW_NAME_SIZE 84
36
37 #define LPFC_PCI_DEV_LP 0x1
38 #define LPFC_PCI_DEV_OC 0x2
39
40 #define LPFC_SLI_REV2 2
41 #define LPFC_SLI_REV3 3
42 #define LPFC_SLI_REV4 4
43
44 #define LPFC_MAX_TARGET 4096 /* max number of targets supported */
45 #define LPFC_MAX_DISC_THREADS 64 /* max outstanding discovery els
46 requests */
47 #define LPFC_MAX_NS_RETRY 3 /* Number of retry attempts to contact
48 the NameServer before giving up. */
49 #define LPFC_CMD_PER_LUN 3 /* max outstanding cmds per lun */
50 #define LPFC_DEFAULT_SG_SEG_CNT 64 /* sg element count per scsi cmnd */
51 #define LPFC_DEFAULT_MENLO_SG_SEG_CNT 128 /* sg element count per scsi
52 cmnd for menlo needs nearly twice as for firmware
53 downloads using bsg */
54
55 #define LPFC_DEFAULT_XPSGL_SIZE 256
56 #define LPFC_MAX_SG_TABLESIZE 0xffff
57 #define LPFC_MIN_SG_SLI4_BUF_SZ 0x800 /* based on LPFC_DEFAULT_SG_SEG_CNT */
58 #define LPFC_MAX_BG_SLI4_SEG_CNT_DIF 128 /* sg element count for BlockGuard */
59 #define LPFC_MAX_SG_SEG_CNT_DIF 512 /* sg element count per scsi cmnd */
60 #define LPFC_MAX_SG_SEG_CNT 4096 /* sg element count per scsi cmnd */
61 #define LPFC_MIN_SG_SEG_CNT 32 /* sg element count per scsi cmnd */
62 #define LPFC_MAX_SGL_SEG_CNT 512 /* SGL element count per scsi cmnd */
63 #define LPFC_MAX_BPL_SEG_CNT 4096 /* BPL element count per scsi cmnd */
64 #define LPFC_MAX_NVME_SEG_CNT 256 /* max SGL element cnt per NVME cmnd */
65
66 #define LPFC_MAX_SGE_SIZE 0x80000000 /* Maximum data allowed in a SGE */
67 #define LPFC_IOCB_LIST_CNT 2250 /* list of IOCBs for fast-path usage. */
68 #define LPFC_Q_RAMP_UP_INTERVAL 120 /* lun q_depth ramp up interval */
69 #define LPFC_VNAME_LEN 100 /* vport symbolic name length */
70 #define LPFC_TGTQ_RAMPUP_PCENT 5 /* Target queue rampup in percentage */
71 #define LPFC_MIN_TGT_QDEPTH 10
72 #define LPFC_MAX_TGT_QDEPTH 0xFFFF
73
74 #define LPFC_MAX_BUCKET_COUNT 20 /* Maximum no. of buckets for stat data
75 collection. */
76 /*
77 * Following time intervals are used of adjusting SCSI device
78 * queue depths when there are driver resource error or Firmware
79 * resource error.
80 */
81 /* 1 Second */
82 #define QUEUE_RAMP_DOWN_INTERVAL (msecs_to_jiffies(1000 * 1))
83
84 /* Number of exchanges reserved for discovery to complete */
85 #define LPFC_DISC_IOCB_BUFF_COUNT 20
86
87 #define LPFC_HB_MBOX_INTERVAL 5 /* Heart beat interval in seconds. */
88 #define LPFC_HB_MBOX_TIMEOUT 30 /* Heart beat timeout in seconds. */
89
90 /* Error Attention event polling interval */
91 #define LPFC_ERATT_POLL_INTERVAL 5 /* EATT poll interval in seconds */
92
93 /* Define macros for 64 bit support */
94 #define putPaddrLow(addr) ((uint32_t) (0xffffffff & (u64)(addr)))
95 #define putPaddrHigh(addr) ((uint32_t) (0xffffffff & (((u64)(addr))>>32)))
96 #define getPaddr(high, low) ((dma_addr_t)( \
97 (( (u64)(high)<<16 ) << 16)|( (u64)(low))))
98 /* Provide maximum configuration definitions. */
99 #define LPFC_DRVR_TIMEOUT 16 /* driver iocb timeout value in sec */
100 #define FC_MAX_ADPTMSG 64
101
102 #define MAX_HBAEVT 32
103 #define MAX_HBAS_NO_RESET 16
104
105 /* Number of MSI-X vectors the driver uses */
106 #define LPFC_MSIX_VECTORS 2
107
108 /* lpfc wait event data ready flag */
109 #define LPFC_DATA_READY 0 /* bit 0 */
110
111 /* queue dump line buffer size */
112 #define LPFC_LBUF_SZ 128
113
114 /* mailbox system shutdown options */
115 #define LPFC_MBX_NO_WAIT 0
116 #define LPFC_MBX_WAIT 1
117
118 enum lpfc_polling_flags {
119 ENABLE_FCP_RING_POLLING = 0x1,
120 DISABLE_FCP_RING_INT = 0x2
121 };
122
123 struct perf_prof {
124 uint16_t cmd_cpu[40];
125 uint16_t rsp_cpu[40];
126 uint16_t qh_cpu[40];
127 uint16_t wqidx[40];
128 };
129
130 /*
131 * Provide for FC4 TYPE x28 - NVME. The
132 * bit mask for FCP and NVME is 0x8 identically
133 * because they are 32 bit positions distance.
134 */
135 #define LPFC_FC4_TYPE_BITMASK 0x00000100
136
137 /* Provide DMA memory definitions the driver uses per port instance. */
138 struct lpfc_dmabuf {
139 struct list_head list;
140 void *virt; /* virtual address ptr */
141 dma_addr_t phys; /* mapped address */
142 uint32_t buffer_tag; /* used for tagged queue ring */
143 };
144
145 struct lpfc_nvmet_ctxbuf {
146 struct list_head list;
147 struct lpfc_async_xchg_ctx *context;
148 struct lpfc_iocbq *iocbq;
149 struct lpfc_sglq *sglq;
150 struct work_struct defer_work;
151 };
152
153 struct lpfc_dma_pool {
154 struct lpfc_dmabuf *elements;
155 uint32_t max_count;
156 uint32_t current_count;
157 };
158
159 struct hbq_dmabuf {
160 struct lpfc_dmabuf hbuf;
161 struct lpfc_dmabuf dbuf;
162 uint16_t total_size;
163 uint16_t bytes_recv;
164 uint32_t tag;
165 struct lpfc_cq_event cq_event;
166 unsigned long time_stamp;
167 void *context;
168 };
169
170 struct rqb_dmabuf {
171 struct lpfc_dmabuf hbuf;
172 struct lpfc_dmabuf dbuf;
173 uint16_t total_size;
174 uint16_t bytes_recv;
175 uint16_t idx;
176 struct lpfc_queue *hrq; /* ptr to associated Header RQ */
177 struct lpfc_queue *drq; /* ptr to associated Data RQ */
178 };
179
180 /* Priority bit. Set value to exceed low water mark in lpfc_mem. */
181 #define MEM_PRI 0x100
182
183
184 /****************************************************************************/
185 /* Device VPD save area */
186 /****************************************************************************/
187 typedef struct lpfc_vpd {
188 uint32_t status; /* vpd status value */
189 uint32_t length; /* number of bytes actually returned */
190 struct {
191 uint32_t rsvd1; /* Revision numbers */
192 uint32_t biuRev;
193 uint32_t smRev;
194 uint32_t smFwRev;
195 uint32_t endecRev;
196 uint16_t rBit;
197 uint8_t fcphHigh;
198 uint8_t fcphLow;
199 uint8_t feaLevelHigh;
200 uint8_t feaLevelLow;
201 uint32_t postKernRev;
202 uint32_t opFwRev;
203 uint8_t opFwName[16];
204 uint32_t sli1FwRev;
205 uint8_t sli1FwName[16];
206 uint32_t sli2FwRev;
207 uint8_t sli2FwName[16];
208 } rev;
209 struct {
210 #ifdef __BIG_ENDIAN_BITFIELD
211 uint32_t rsvd3 :20; /* Reserved */
212 uint32_t rsvd2 : 3; /* Reserved */
213 uint32_t cbg : 1; /* Configure BlockGuard */
214 uint32_t cmv : 1; /* Configure Max VPIs */
215 uint32_t ccrp : 1; /* Config Command Ring Polling */
216 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
217 uint32_t chbs : 1; /* Cofigure Host Backing store */
218 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
219 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
220 uint32_t cmx : 1; /* Configure Max XRIs */
221 uint32_t cmr : 1; /* Configure Max RPIs */
222 #else /* __LITTLE_ENDIAN */
223 uint32_t cmr : 1; /* Configure Max RPIs */
224 uint32_t cmx : 1; /* Configure Max XRIs */
225 uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */
226 uint32_t cinb : 1; /* Enable Interrupt Notification Block */
227 uint32_t chbs : 1; /* Cofigure Host Backing store */
228 uint32_t csah : 1; /* Configure Synchronous Abort Handling */
229 uint32_t ccrp : 1; /* Config Command Ring Polling */
230 uint32_t cmv : 1; /* Configure Max VPIs */
231 uint32_t cbg : 1; /* Configure BlockGuard */
232 uint32_t rsvd2 : 3; /* Reserved */
233 uint32_t rsvd3 :20; /* Reserved */
234 #endif
235 } sli3Feat;
236 } lpfc_vpd_t;
237
238
239 /*
240 * lpfc stat counters
241 */
242 struct lpfc_stats {
243 /* Statistics for ELS commands */
244 uint32_t elsLogiCol;
245 uint32_t elsRetryExceeded;
246 uint32_t elsXmitRetry;
247 uint32_t elsDelayRetry;
248 uint32_t elsRcvDrop;
249 uint32_t elsRcvFrame;
250 uint32_t elsRcvRSCN;
251 uint32_t elsRcvRNID;
252 uint32_t elsRcvFARP;
253 uint32_t elsRcvFARPR;
254 uint32_t elsRcvFLOGI;
255 uint32_t elsRcvPLOGI;
256 uint32_t elsRcvADISC;
257 uint32_t elsRcvPDISC;
258 uint32_t elsRcvFAN;
259 uint32_t elsRcvLOGO;
260 uint32_t elsRcvPRLO;
261 uint32_t elsRcvPRLI;
262 uint32_t elsRcvLIRR;
263 uint32_t elsRcvRLS;
264 uint32_t elsRcvRPL;
265 uint32_t elsRcvRRQ;
266 uint32_t elsRcvRTV;
267 uint32_t elsRcvECHO;
268 uint32_t elsRcvLCB;
269 uint32_t elsRcvRDP;
270 uint32_t elsXmitFLOGI;
271 uint32_t elsXmitFDISC;
272 uint32_t elsXmitPLOGI;
273 uint32_t elsXmitPRLI;
274 uint32_t elsXmitADISC;
275 uint32_t elsXmitLOGO;
276 uint32_t elsXmitSCR;
277 uint32_t elsXmitRSCN;
278 uint32_t elsXmitRNID;
279 uint32_t elsXmitFARP;
280 uint32_t elsXmitFARPR;
281 uint32_t elsXmitACC;
282 uint32_t elsXmitLSRJT;
283
284 uint32_t frameRcvBcast;
285 uint32_t frameRcvMulti;
286 uint32_t strayXmitCmpl;
287 uint32_t frameXmitDelay;
288 uint32_t xriCmdCmpl;
289 uint32_t xriStatErr;
290 uint32_t LinkUp;
291 uint32_t LinkDown;
292 uint32_t LinkMultiEvent;
293 uint32_t NoRcvBuf;
294 uint32_t fcpCmd;
295 uint32_t fcpCmpl;
296 uint32_t fcpRspErr;
297 uint32_t fcpRemoteStop;
298 uint32_t fcpPortRjt;
299 uint32_t fcpPortBusy;
300 uint32_t fcpError;
301 uint32_t fcpLocalErr;
302 };
303
304 struct lpfc_hba;
305
306
307 enum discovery_state {
308 LPFC_VPORT_UNKNOWN = 0, /* vport state is unknown */
309 LPFC_VPORT_FAILED = 1, /* vport has failed */
310 LPFC_LOCAL_CFG_LINK = 6, /* local NPORT Id configured */
311 LPFC_FLOGI = 7, /* FLOGI sent to Fabric */
312 LPFC_FDISC = 8, /* FDISC sent for vport */
313 LPFC_FABRIC_CFG_LINK = 9, /* Fabric assigned NPORT Id
314 * configured */
315 LPFC_NS_REG = 10, /* Register with NameServer */
316 LPFC_NS_QRY = 11, /* Query NameServer for NPort ID list */
317 LPFC_BUILD_DISC_LIST = 12, /* Build ADISC and PLOGI lists for
318 * device authentication / discovery */
319 LPFC_DISC_AUTH = 13, /* Processing ADISC list */
320 LPFC_VPORT_READY = 32,
321 };
322
323 enum hba_state {
324 LPFC_LINK_UNKNOWN = 0, /* HBA state is unknown */
325 LPFC_WARM_START = 1, /* HBA state after selective reset */
326 LPFC_INIT_START = 2, /* Initial state after board reset */
327 LPFC_INIT_MBX_CMDS = 3, /* Initialize HBA with mbox commands */
328 LPFC_LINK_DOWN = 4, /* HBA initialized, link is down */
329 LPFC_LINK_UP = 5, /* Link is up - issue READ_LA */
330 LPFC_CLEAR_LA = 6, /* authentication cmplt - issue
331 * CLEAR_LA */
332 LPFC_HBA_READY = 32,
333 LPFC_HBA_ERROR = -1
334 };
335
336 struct lpfc_trunk_link_state {
337 enum hba_state state;
338 uint8_t fault;
339 };
340
341 struct lpfc_trunk_link {
342 struct lpfc_trunk_link_state link0,
343 link1,
344 link2,
345 link3;
346 };
347
348 struct lpfc_vport {
349 struct lpfc_hba *phba;
350 struct list_head listentry;
351 uint8_t port_type;
352 #define LPFC_PHYSICAL_PORT 1
353 #define LPFC_NPIV_PORT 2
354 #define LPFC_FABRIC_PORT 3
355 enum discovery_state port_state;
356
357 uint16_t vpi;
358 uint16_t vfi;
359 uint8_t vpi_state;
360 #define LPFC_VPI_REGISTERED 0x1
361
362 uint32_t fc_flag; /* FC flags */
363 /* Several of these flags are HBA centric and should be moved to
364 * phba->link_flag (e.g. FC_PTP, FC_PUBLIC_LOOP)
365 */
366 #define FC_PT2PT 0x1 /* pt2pt with no fabric */
367 #define FC_PT2PT_PLOGI 0x2 /* pt2pt initiate PLOGI */
368 #define FC_DISC_TMO 0x4 /* Discovery timer running */
369 #define FC_PUBLIC_LOOP 0x8 /* Public loop */
370 #define FC_LBIT 0x10 /* LOGIN bit in loopinit set */
371 #define FC_RSCN_MODE 0x20 /* RSCN cmd rcv'ed */
372 #define FC_NLP_MORE 0x40 /* More node to process in node tbl */
373 #define FC_OFFLINE_MODE 0x80 /* Interface is offline for diag */
374 #define FC_FABRIC 0x100 /* We are fabric attached */
375 #define FC_VPORT_LOGO_RCVD 0x200 /* LOGO received on vport */
376 #define FC_RSCN_DISCOVERY 0x400 /* Auth all devices after RSCN */
377 #define FC_LOGO_RCVD_DID_CHNG 0x800 /* FDISC on phys port detect DID chng*/
378 #define FC_PT2PT_NO_NVME 0x1000 /* Don't send NVME PRLI */
379 #define FC_SCSI_SCAN_TMO 0x4000 /* scsi scan timer running */
380 #define FC_ABORT_DISCOVERY 0x8000 /* we want to abort discovery */
381 #define FC_NDISC_ACTIVE 0x10000 /* NPort discovery active */
382 #define FC_BYPASSED_MODE 0x20000 /* NPort is in bypassed mode */
383 #define FC_VPORT_NEEDS_REG_VPI 0x80000 /* Needs to have its vpi registered */
384 #define FC_RSCN_DEFERRED 0x100000 /* A deferred RSCN being processed */
385 #define FC_VPORT_NEEDS_INIT_VPI 0x200000 /* Need to INIT_VPI before FDISC */
386 #define FC_VPORT_CVL_RCVD 0x400000 /* VLink failed due to CVL */
387 #define FC_VFI_REGISTERED 0x800000 /* VFI is registered */
388 #define FC_FDISC_COMPLETED 0x1000000/* FDISC completed */
389 #define FC_DISC_DELAYED 0x2000000/* Delay NPort discovery */
390
391 uint32_t ct_flags;
392 #define FC_CT_RFF_ID 0x1 /* RFF_ID accepted by switch */
393 #define FC_CT_RNN_ID 0x2 /* RNN_ID accepted by switch */
394 #define FC_CT_RSNN_NN 0x4 /* RSNN_NN accepted by switch */
395 #define FC_CT_RSPN_ID 0x8 /* RSPN_ID accepted by switch */
396 #define FC_CT_RFT_ID 0x10 /* RFT_ID accepted by switch */
397
398 struct list_head fc_nodes;
399
400 /* Keep counters for the number of entries in each list. */
401 uint16_t fc_plogi_cnt;
402 uint16_t fc_adisc_cnt;
403 uint16_t fc_reglogin_cnt;
404 uint16_t fc_prli_cnt;
405 uint16_t fc_unmap_cnt;
406 uint16_t fc_map_cnt;
407 uint16_t fc_npr_cnt;
408 uint16_t fc_unused_cnt;
409 struct serv_parm fc_sparam; /* buffer for our service parameters */
410
411 uint32_t fc_myDID; /* fibre channel S_ID */
412 uint32_t fc_prevDID; /* previous fibre channel S_ID */
413 struct lpfc_name fabric_portname;
414 struct lpfc_name fabric_nodename;
415
416 int32_t stopped; /* HBA has not been restarted since last ERATT */
417 uint8_t fc_linkspeed; /* Link speed after last READ_LA */
418
419 uint32_t num_disc_nodes; /* in addition to hba_state */
420 uint32_t gidft_inp; /* cnt of outstanding GID_FTs */
421
422 uint32_t fc_nlp_cnt; /* outstanding NODELIST requests */
423 uint32_t fc_rscn_id_cnt; /* count of RSCNs payloads in list */
424 uint32_t fc_rscn_flush; /* flag use of fc_rscn_id_list */
425 struct lpfc_dmabuf *fc_rscn_id_list[FC_MAX_HOLD_RSCN];
426 struct lpfc_name fc_nodename; /* fc nodename */
427 struct lpfc_name fc_portname; /* fc portname */
428
429 struct lpfc_work_evt disc_timeout_evt;
430
431 struct timer_list fc_disctmo; /* Discovery rescue timer */
432 uint8_t fc_ns_retry; /* retries for fabric nameserver */
433 uint32_t fc_prli_sent; /* cntr for outstanding PRLIs */
434
435 spinlock_t work_port_lock;
436 uint32_t work_port_events; /* Timeout to be handled */
437 #define WORKER_DISC_TMO 0x1 /* vport: Discovery timeout */
438 #define WORKER_ELS_TMO 0x2 /* vport: ELS timeout */
439 #define WORKER_DELAYED_DISC_TMO 0x8 /* vport: delayed discovery */
440
441 #define WORKER_MBOX_TMO 0x100 /* hba: MBOX timeout */
442 #define WORKER_HB_TMO 0x200 /* hba: Heart beat timeout */
443 #define WORKER_FABRIC_BLOCK_TMO 0x400 /* hba: fabric block timeout */
444 #define WORKER_RAMP_DOWN_QUEUE 0x800 /* hba: Decrease Q depth */
445 #define WORKER_RAMP_UP_QUEUE 0x1000 /* hba: Increase Q depth */
446 #define WORKER_SERVICE_TXQ 0x2000 /* hba: IOCBs on the txq */
447
448 struct timer_list els_tmofunc;
449 struct timer_list delayed_disc_tmo;
450
451 int unreg_vpi_cmpl;
452
453 uint8_t load_flag;
454 #define FC_LOADING 0x1 /* HBA in process of loading drvr */
455 #define FC_UNLOADING 0x2 /* HBA in process of unloading drvr */
456 #define FC_ALLOW_FDMI 0x4 /* port is ready for FDMI requests */
457 /* Vport Config Parameters */
458 uint32_t cfg_scan_down;
459 uint32_t cfg_lun_queue_depth;
460 uint32_t cfg_nodev_tmo;
461 uint32_t cfg_devloss_tmo;
462 uint32_t cfg_restrict_login;
463 uint32_t cfg_peer_port_login;
464 uint32_t cfg_fcp_class;
465 uint32_t cfg_use_adisc;
466 uint32_t cfg_discovery_threads;
467 uint32_t cfg_log_verbose;
468 uint32_t cfg_enable_fc4_type;
469 uint32_t cfg_max_luns;
470 uint32_t cfg_enable_da_id;
471 uint32_t cfg_max_scsicmpl_time;
472 uint32_t cfg_tgt_queue_depth;
473 uint32_t cfg_first_burst_size;
474 uint32_t dev_loss_tmo_changed;
475
476 struct fc_vport *fc_vport;
477
478 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
479 struct dentry *debug_disc_trc;
480 struct dentry *debug_nodelist;
481 struct dentry *debug_nvmestat;
482 struct dentry *debug_scsistat;
483 struct dentry *debug_ioktime;
484 struct dentry *debug_hdwqstat;
485 struct dentry *vport_debugfs_root;
486 struct lpfc_debugfs_trc *disc_trc;
487 atomic_t disc_trc_cnt;
488 #endif
489 uint8_t stat_data_enabled;
490 uint8_t stat_data_blocked;
491 struct list_head rcv_buffer_list;
492 unsigned long rcv_buffer_time_stamp;
493 uint32_t vport_flag;
494 #define STATIC_VPORT 1
495 #define FAWWPN_SET 2
496 #define FAWWPN_PARAM_CHG 4
497
498 uint16_t fdmi_num_disc;
499 uint32_t fdmi_hba_mask;
500 uint32_t fdmi_port_mask;
501
502 /* There is a single nvme instance per vport. */
503 struct nvme_fc_local_port *localport;
504 uint8_t nvmei_support; /* driver supports NVME Initiator */
505 uint32_t last_fcp_wqidx;
506 uint32_t rcv_flogi_cnt; /* How many unsol FLOGIs ACK'd. */
507 };
508
509 struct hbq_s {
510 uint16_t entry_count; /* Current number of HBQ slots */
511 uint16_t buffer_count; /* Current number of buffers posted */
512 uint32_t next_hbqPutIdx; /* Index to next HBQ slot to use */
513 uint32_t hbqPutIdx; /* HBQ slot to use */
514 uint32_t local_hbqGetIdx; /* Local copy of Get index from Port */
515 void *hbq_virt; /* Virtual ptr to this hbq */
516 struct list_head hbq_buffer_list; /* buffers assigned to this HBQ */
517 /* Callback for HBQ buffer allocation */
518 struct hbq_dmabuf *(*hbq_alloc_buffer) (struct lpfc_hba *);
519 /* Callback for HBQ buffer free */
520 void (*hbq_free_buffer) (struct lpfc_hba *,
521 struct hbq_dmabuf *);
522 };
523
524 /* this matches the position in the lpfc_hbq_defs array */
525 #define LPFC_ELS_HBQ 0
526 #define LPFC_MAX_HBQS 1
527
528 enum hba_temp_state {
529 HBA_NORMAL_TEMP,
530 HBA_OVER_TEMP
531 };
532
533 enum intr_type_t {
534 NONE = 0,
535 INTx,
536 MSI,
537 MSIX,
538 };
539
540 #define LPFC_CT_CTX_MAX 64
541 struct unsol_rcv_ct_ctx {
542 uint32_t ctxt_id;
543 uint32_t SID;
544 uint32_t valid;
545 #define UNSOL_INVALID 0
546 #define UNSOL_VALID 1
547 uint16_t oxid;
548 uint16_t rxid;
549 };
550
551 #define LPFC_USER_LINK_SPEED_AUTO 0 /* auto select (default)*/
552 #define LPFC_USER_LINK_SPEED_1G 1 /* 1 Gigabaud */
553 #define LPFC_USER_LINK_SPEED_2G 2 /* 2 Gigabaud */
554 #define LPFC_USER_LINK_SPEED_4G 4 /* 4 Gigabaud */
555 #define LPFC_USER_LINK_SPEED_8G 8 /* 8 Gigabaud */
556 #define LPFC_USER_LINK_SPEED_10G 10 /* 10 Gigabaud */
557 #define LPFC_USER_LINK_SPEED_16G 16 /* 16 Gigabaud */
558 #define LPFC_USER_LINK_SPEED_32G 32 /* 32 Gigabaud */
559 #define LPFC_USER_LINK_SPEED_64G 64 /* 64 Gigabaud */
560 #define LPFC_USER_LINK_SPEED_MAX LPFC_USER_LINK_SPEED_64G
561
562 #define LPFC_LINK_SPEED_STRING "0, 1, 2, 4, 8, 10, 16, 32, 64"
563
564 enum nemb_type {
565 nemb_mse = 1,
566 nemb_hbd
567 };
568
569 enum mbox_type {
570 mbox_rd = 1,
571 mbox_wr
572 };
573
574 enum dma_type {
575 dma_mbox = 1,
576 dma_ebuf
577 };
578
579 enum sta_type {
580 sta_pre_addr = 1,
581 sta_pos_addr
582 };
583
584 struct lpfc_mbox_ext_buf_ctx {
585 uint32_t state;
586 #define LPFC_BSG_MBOX_IDLE 0
587 #define LPFC_BSG_MBOX_HOST 1
588 #define LPFC_BSG_MBOX_PORT 2
589 #define LPFC_BSG_MBOX_DONE 3
590 #define LPFC_BSG_MBOX_ABTS 4
591 enum nemb_type nembType;
592 enum mbox_type mboxType;
593 uint32_t numBuf;
594 uint32_t mbxTag;
595 uint32_t seqNum;
596 struct lpfc_dmabuf *mbx_dmabuf;
597 struct list_head ext_dmabuf_list;
598 };
599
600 struct lpfc_epd_pool {
601 /* Expedite pool */
602 struct list_head list;
603 u32 count;
604 spinlock_t lock; /* lock for expedite pool */
605 };
606
607 enum ras_state {
608 INACTIVE,
609 REG_INPROGRESS,
610 ACTIVE
611 };
612
613 struct lpfc_ras_fwlog {
614 uint8_t *fwlog_buff;
615 uint32_t fw_buffcount; /* Buffer size posted to FW */
616 #define LPFC_RAS_BUFF_ENTERIES 16 /* Each entry can hold max of 64k */
617 #define LPFC_RAS_MAX_ENTRY_SIZE (64 * 1024)
618 #define LPFC_RAS_MIN_BUFF_POST_SIZE (256 * 1024)
619 #define LPFC_RAS_MAX_BUFF_POST_SIZE (1024 * 1024)
620 uint32_t fw_loglevel; /* Log level set */
621 struct lpfc_dmabuf lwpd;
622 struct list_head fwlog_buff_list;
623
624 /* RAS support status on adapter */
625 bool ras_hwsupport; /* RAS Support available on HW or not */
626 bool ras_enabled; /* Ras Enabled for the function */
627 #define LPFC_RAS_DISABLE_LOGGING 0x00
628 #define LPFC_RAS_ENABLE_LOGGING 0x01
629 enum ras_state state; /* RAS logging running state */
630 };
631
632 #define DBG_LOG_STR_SZ 256
633 #define DBG_LOG_SZ 256
634
635 struct dbg_log_ent {
636 char log[DBG_LOG_STR_SZ];
637 u64 t_ns;
638 };
639
640 enum lpfc_irq_chann_mode {
641 /* Assign IRQs to all possible cpus that have hardware queues */
642 NORMAL_MODE,
643
644 /* Assign IRQs only to cpus on the same numa node as HBA */
645 NUMA_MODE,
646
647 /* Assign IRQs only on non-hyperthreaded CPUs. This is the
648 * same as normal_mode, but assign IRQS only on physical CPUs.
649 */
650 NHT_MODE,
651 };
652
653 struct lpfc_hba {
654 /* SCSI interface function jump table entries */
655 struct lpfc_io_buf * (*lpfc_get_scsi_buf)
656 (struct lpfc_hba *phba, struct lpfc_nodelist *ndlp,
657 struct scsi_cmnd *cmnd);
658 int (*lpfc_scsi_prep_dma_buf)
659 (struct lpfc_hba *, struct lpfc_io_buf *);
660 void (*lpfc_scsi_unprep_dma_buf)
661 (struct lpfc_hba *, struct lpfc_io_buf *);
662 void (*lpfc_release_scsi_buf)
663 (struct lpfc_hba *, struct lpfc_io_buf *);
664 void (*lpfc_rampdown_queue_depth)
665 (struct lpfc_hba *);
666 void (*lpfc_scsi_prep_cmnd)
667 (struct lpfc_vport *, struct lpfc_io_buf *,
668 struct lpfc_nodelist *);
669
670 /* IOCB interface function jump table entries */
671 int (*__lpfc_sli_issue_iocb)
672 (struct lpfc_hba *, uint32_t,
673 struct lpfc_iocbq *, uint32_t);
674 void (*__lpfc_sli_release_iocbq)(struct lpfc_hba *,
675 struct lpfc_iocbq *);
676 int (*lpfc_hba_down_post)(struct lpfc_hba *phba);
677 IOCB_t * (*lpfc_get_iocb_from_iocbq)
678 (struct lpfc_iocbq *);
679 void (*lpfc_scsi_cmd_iocb_cmpl)
680 (struct lpfc_hba *, struct lpfc_iocbq *, struct lpfc_iocbq *);
681
682 /* MBOX interface function jump table entries */
683 int (*lpfc_sli_issue_mbox)
684 (struct lpfc_hba *, LPFC_MBOXQ_t *, uint32_t);
685
686 /* Slow-path IOCB process function jump table entries */
687 void (*lpfc_sli_handle_slow_ring_event)
688 (struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
689 uint32_t mask);
690
691 /* INIT device interface function jump table entries */
692 int (*lpfc_sli_hbq_to_firmware)
693 (struct lpfc_hba *, uint32_t, struct hbq_dmabuf *);
694 int (*lpfc_sli_brdrestart)
695 (struct lpfc_hba *);
696 int (*lpfc_sli_brdready)
697 (struct lpfc_hba *, uint32_t);
698 void (*lpfc_handle_eratt)
699 (struct lpfc_hba *);
700 void (*lpfc_stop_port)
701 (struct lpfc_hba *);
702 int (*lpfc_hba_init_link)
703 (struct lpfc_hba *, uint32_t);
704 int (*lpfc_hba_down_link)
705 (struct lpfc_hba *, uint32_t);
706 int (*lpfc_selective_reset)
707 (struct lpfc_hba *);
708
709 int (*lpfc_bg_scsi_prep_dma_buf)
710 (struct lpfc_hba *, struct lpfc_io_buf *);
711 /* Add new entries here */
712
713 /* expedite pool */
714 struct lpfc_epd_pool epd_pool;
715
716 /* SLI4 specific HBA data structure */
717 struct lpfc_sli4_hba sli4_hba;
718
719 struct workqueue_struct *wq;
720 struct delayed_work eq_delay_work;
721
722 #define LPFC_IDLE_STAT_DELAY 1000
723 struct delayed_work idle_stat_delay_work;
724
725 struct lpfc_sli sli;
726 uint8_t pci_dev_grp; /* lpfc PCI dev group: 0x0, 0x1, 0x2,... */
727 uint32_t sli_rev; /* SLI2, SLI3, or SLI4 */
728 uint32_t sli3_options; /* Mask of enabled SLI3 options */
729 #define LPFC_SLI3_HBQ_ENABLED 0x01
730 #define LPFC_SLI3_NPIV_ENABLED 0x02
731 #define LPFC_SLI3_VPORT_TEARDOWN 0x04
732 #define LPFC_SLI3_CRP_ENABLED 0x08
733 #define LPFC_SLI3_BG_ENABLED 0x20
734 #define LPFC_SLI3_DSS_ENABLED 0x40
735 #define LPFC_SLI4_PERFH_ENABLED 0x80
736 #define LPFC_SLI4_PHWQ_ENABLED 0x100
737 uint32_t iocb_cmd_size;
738 uint32_t iocb_rsp_size;
739
740 struct lpfc_trunk_link trunk_link;
741 enum hba_state link_state;
742 uint32_t link_flag; /* link state flags */
743 #define LS_LOOPBACK_MODE 0x1 /* NPort is in Loopback mode */
744 /* This flag is set while issuing */
745 /* INIT_LINK mailbox command */
746 #define LS_NPIV_FAB_SUPPORTED 0x2 /* Fabric supports NPIV */
747 #define LS_IGNORE_ERATT 0x4 /* intr handler should ignore ERATT */
748 #define LS_MDS_LINK_DOWN 0x8 /* MDS Diagnostics Link Down */
749 #define LS_MDS_LOOPBACK 0x10 /* MDS Diagnostics Link Up (Loopback) */
750
751 uint32_t hba_flag; /* hba generic flags */
752 #define HBA_ERATT_HANDLED 0x1 /* This flag is set when eratt handled */
753 #define DEFER_ERATT 0x2 /* Deferred error attention in progress */
754 #define HBA_FCOE_MODE 0x4 /* HBA function in FCoE Mode */
755 #define HBA_SP_QUEUE_EVT 0x8 /* Slow-path qevt posted to worker thread*/
756 #define HBA_POST_RECEIVE_BUFFER 0x10 /* Rcv buffers need to be posted */
757 #define HBA_PERSISTENT_TOPO 0x20 /* Persistent topology support in hba */
758 #define ELS_XRI_ABORT_EVENT 0x40 /* ELS_XRI abort event was queued */
759 #define ASYNC_EVENT 0x80
760 #define LINK_DISABLED 0x100 /* Link disabled by user */
761 #define FCF_TS_INPROG 0x200 /* FCF table scan in progress */
762 #define FCF_RR_INPROG 0x400 /* FCF roundrobin flogi in progress */
763 #define HBA_FIP_SUPPORT 0x800 /* FIP support in HBA */
764 #define HBA_AER_ENABLED 0x1000 /* AER enabled with HBA */
765 #define HBA_DEVLOSS_TMO 0x2000 /* HBA in devloss timeout */
766 #define HBA_RRQ_ACTIVE 0x4000 /* process the rrq active list */
767 #define HBA_IOQ_FLUSH 0x8000 /* FCP/NVME I/O queues being flushed */
768 #define HBA_RECOVERABLE_UE 0x20000 /* Firmware supports recoverable UE */
769 #define HBA_FORCED_LINK_SPEED 0x40000 /*
770 * Firmware supports Forced Link Speed
771 * capability
772 */
773 #define HBA_FLOGI_ISSUED 0x100000 /* FLOGI was issued */
774 #define HBA_DEFER_FLOGI 0x800000 /* Defer FLOGI till read_sparm cmpl */
775
776 struct completion *fw_dump_cmpl; /* cmpl event tracker for fw_dump */
777 uint32_t fcp_ring_in_use; /* When polling test if intr-hndlr active*/
778 struct lpfc_dmabuf slim2p;
779
780 MAILBOX_t *mbox;
781 uint32_t *mbox_ext;
782 struct lpfc_mbox_ext_buf_ctx mbox_ext_buf_ctx;
783 uint32_t ha_copy;
784 struct _PCB *pcb;
785 struct _IOCB *IOCBs;
786
787 struct lpfc_dmabuf hbqslimp;
788
789 uint16_t pci_cfg_value;
790
791 uint8_t fc_linkspeed; /* Link speed after last READ_LA */
792
793 uint32_t fc_eventTag; /* event tag for link attention */
794 uint32_t link_events;
795
796 /* These fields used to be binfo */
797 uint32_t fc_pref_DID; /* preferred D_ID */
798 uint8_t fc_pref_ALPA; /* preferred AL_PA */
799 uint32_t fc_edtovResol; /* E_D_TOV timer resolution */
800 uint32_t fc_edtov; /* E_D_TOV timer value */
801 uint32_t fc_arbtov; /* ARB_TOV timer value */
802 uint32_t fc_ratov; /* R_A_TOV timer value */
803 uint32_t fc_rttov; /* R_T_TOV timer value */
804 uint32_t fc_altov; /* AL_TOV timer value */
805 uint32_t fc_crtov; /* C_R_TOV timer value */
806
807 struct serv_parm fc_fabparam; /* fabric service parameters buffer */
808 uint8_t alpa_map[128]; /* AL_PA map from READ_LA */
809
810 uint32_t lmt;
811
812 uint32_t fc_topology; /* link topology, from LINK INIT */
813 uint32_t fc_topology_changed; /* link topology, from LINK INIT */
814
815 struct lpfc_stats fc_stat;
816
817 struct lpfc_nodelist fc_fcpnodev; /* nodelist entry for no device */
818 uint32_t nport_event_cnt; /* timestamp for nlplist entry */
819
820 uint8_t wwnn[8];
821 uint8_t wwpn[8];
822 uint32_t RandomData[7];
823 uint8_t fcp_embed_io;
824 uint8_t nvme_support; /* Firmware supports NVME */
825 uint8_t nvmet_support; /* driver supports NVMET */
826 #define LPFC_NVMET_MAX_PORTS 32
827 uint8_t mds_diags_support;
828 uint8_t bbcredit_support;
829 uint8_t enab_exp_wqcq_pages;
830 u8 nsler; /* Firmware supports FC-NVMe-2 SLER */
831
832 /* HBA Config Parameters */
833 uint32_t cfg_ack0;
834 uint32_t cfg_xri_rebalancing;
835 uint32_t cfg_xpsgl;
836 uint32_t cfg_enable_npiv;
837 uint32_t cfg_enable_rrq;
838 uint32_t cfg_topology;
839 uint32_t cfg_link_speed;
840 #define LPFC_FCF_FOV 1 /* Fast fcf failover */
841 #define LPFC_FCF_PRIORITY 2 /* Priority fcf failover */
842 uint32_t cfg_fcf_failover_policy;
843 uint32_t cfg_fcp_io_sched;
844 uint32_t cfg_ns_query;
845 uint32_t cfg_fcp2_no_tgt_reset;
846 uint32_t cfg_cr_delay;
847 uint32_t cfg_cr_count;
848 uint32_t cfg_multi_ring_support;
849 uint32_t cfg_multi_ring_rctl;
850 uint32_t cfg_multi_ring_type;
851 uint32_t cfg_poll;
852 uint32_t cfg_poll_tmo;
853 uint32_t cfg_task_mgmt_tmo;
854 uint32_t cfg_use_msi;
855 uint32_t cfg_auto_imax;
856 uint32_t cfg_fcp_imax;
857 uint32_t cfg_force_rscn;
858 uint32_t cfg_cq_poll_threshold;
859 uint32_t cfg_cq_max_proc_limit;
860 uint32_t cfg_fcp_cpu_map;
861 uint32_t cfg_fcp_mq_threshold;
862 uint32_t cfg_hdw_queue;
863 uint32_t cfg_irq_chann;
864 uint32_t cfg_suppress_rsp;
865 uint32_t cfg_nvme_oas;
866 uint32_t cfg_nvme_embed_cmd;
867 uint32_t cfg_nvmet_mrq_post;
868 uint32_t cfg_nvmet_mrq;
869 uint32_t cfg_enable_nvmet;
870 uint32_t cfg_nvme_enable_fb;
871 uint32_t cfg_nvmet_fb_size;
872 uint32_t cfg_total_seg_cnt;
873 uint32_t cfg_sg_seg_cnt;
874 uint32_t cfg_nvme_seg_cnt;
875 uint32_t cfg_scsi_seg_cnt;
876 uint32_t cfg_sg_dma_buf_size;
877 uint64_t cfg_soft_wwnn;
878 uint64_t cfg_soft_wwpn;
879 uint32_t cfg_hba_queue_depth;
880 uint32_t cfg_enable_hba_reset;
881 uint32_t cfg_enable_hba_heartbeat;
882 uint32_t cfg_fof;
883 uint32_t cfg_EnableXLane;
884 uint8_t cfg_oas_tgt_wwpn[8];
885 uint8_t cfg_oas_vpt_wwpn[8];
886 uint32_t cfg_oas_lun_state;
887 #define OAS_LUN_ENABLE 1
888 #define OAS_LUN_DISABLE 0
889 uint32_t cfg_oas_lun_status;
890 #define OAS_LUN_STATUS_EXISTS 0x01
891 uint32_t cfg_oas_flags;
892 #define OAS_FIND_ANY_VPORT 0x01
893 #define OAS_FIND_ANY_TARGET 0x02
894 #define OAS_LUN_VALID 0x04
895 uint32_t cfg_oas_priority;
896 uint32_t cfg_XLanePriority;
897 uint32_t cfg_enable_bg;
898 uint32_t cfg_prot_mask;
899 uint32_t cfg_prot_guard;
900 uint32_t cfg_hostmem_hgp;
901 uint32_t cfg_log_verbose;
902 uint32_t cfg_enable_fc4_type;
903 #define LPFC_ENABLE_FCP 1
904 #define LPFC_ENABLE_NVME 2
905 #define LPFC_ENABLE_BOTH 3
906 #if (IS_ENABLED(CONFIG_NVME_FC))
907 #define LPFC_MAX_ENBL_FC4_TYPE LPFC_ENABLE_BOTH
908 #define LPFC_DEF_ENBL_FC4_TYPE LPFC_ENABLE_BOTH
909 #else
910 #define LPFC_MAX_ENBL_FC4_TYPE LPFC_ENABLE_FCP
911 #define LPFC_DEF_ENBL_FC4_TYPE LPFC_ENABLE_FCP
912 #endif
913 uint32_t cfg_aer_support;
914 uint32_t cfg_sriov_nr_virtfn;
915 uint32_t cfg_request_firmware_upgrade;
916 uint32_t cfg_suppress_link_up;
917 uint32_t cfg_rrq_xri_bitmap_sz;
918 uint32_t cfg_delay_discovery;
919 uint32_t cfg_sli_mode;
920 #define LPFC_INITIALIZE_LINK 0 /* do normal init_link mbox */
921 #define LPFC_DELAY_INIT_LINK 1 /* layered driver hold off */
922 #define LPFC_DELAY_INIT_LINK_INDEFINITELY 2 /* wait, manual intervention */
923 uint32_t cfg_fdmi_on;
924 #define LPFC_FDMI_NO_SUPPORT 0 /* FDMI not supported */
925 #define LPFC_FDMI_SUPPORT 1 /* FDMI supported? */
926 uint32_t cfg_enable_SmartSAN;
927 uint32_t cfg_enable_mds_diags;
928 uint32_t cfg_ras_fwlog_level;
929 uint32_t cfg_ras_fwlog_buffsize;
930 uint32_t cfg_ras_fwlog_func;
931 uint32_t cfg_enable_bbcr; /* Enable BB Credit Recovery */
932 uint32_t cfg_enable_dpp; /* Enable Direct Packet Push */
933 uint32_t cfg_enable_pbde;
934 struct nvmet_fc_target_port *targetport;
935 lpfc_vpd_t vpd; /* vital product data */
936
937 struct pci_dev *pcidev;
938 struct list_head work_list;
939 uint32_t work_ha; /* Host Attention Bits for WT */
940 uint32_t work_ha_mask; /* HA Bits owned by WT */
941 uint32_t work_hs; /* HS stored in case of ERRAT */
942 uint32_t work_status[2]; /* Extra status from SLIM */
943
944 wait_queue_head_t work_waitq;
945 struct task_struct *worker_thread;
946 unsigned long data_flags;
947 uint32_t border_sge_num;
948
949 uint32_t hbq_in_use; /* HBQs in use flag */
950 uint32_t hbq_count; /* Count of configured HBQs */
951 struct hbq_s hbqs[LPFC_MAX_HBQS]; /* local copy of hbq indicies */
952
953 atomic_t fcp_qidx; /* next FCP WQ (RR Policy) */
954 atomic_t nvme_qidx; /* next NVME WQ (RR Policy) */
955
956 phys_addr_t pci_bar0_map; /* Physical address for PCI BAR0 */
957 phys_addr_t pci_bar1_map; /* Physical address for PCI BAR1 */
958 phys_addr_t pci_bar2_map; /* Physical address for PCI BAR2 */
959 void __iomem *slim_memmap_p; /* Kernel memory mapped address for
960 PCI BAR0 */
961 void __iomem *ctrl_regs_memmap_p;/* Kernel memory mapped address for
962 PCI BAR2 */
963
964 void __iomem *pci_bar0_memmap_p; /* Kernel memory mapped address for
965 PCI BAR0 with dual-ULP support */
966 void __iomem *pci_bar2_memmap_p; /* Kernel memory mapped address for
967 PCI BAR2 with dual-ULP support */
968 void __iomem *pci_bar4_memmap_p; /* Kernel memory mapped address for
969 PCI BAR4 with dual-ULP support */
970 #define PCI_64BIT_BAR0 0
971 #define PCI_64BIT_BAR2 2
972 #define PCI_64BIT_BAR4 4
973 void __iomem *MBslimaddr; /* virtual address for mbox cmds */
974 void __iomem *HAregaddr; /* virtual address for host attn reg */
975 void __iomem *CAregaddr; /* virtual address for chip attn reg */
976 void __iomem *HSregaddr; /* virtual address for host status
977 reg */
978 void __iomem *HCregaddr; /* virtual address for host ctl reg */
979
980 struct lpfc_hgp __iomem *host_gp; /* Host side get/put pointers */
981 struct lpfc_pgp *port_gp;
982 uint32_t __iomem *hbq_put; /* Address in SLIM to HBQ put ptrs */
983 uint32_t *hbq_get; /* Host mem address of HBQ get ptrs */
984
985 int brd_no; /* FC board number */
986 char SerialNumber[32]; /* adapter Serial Number */
987 char OptionROMVersion[32]; /* adapter BIOS / Fcode version */
988 char BIOSVersion[16]; /* Boot BIOS version */
989 char ModelDesc[256]; /* Model Description */
990 char ModelName[80]; /* Model Name */
991 char ProgramType[256]; /* Program Type */
992 char Port[20]; /* Port No */
993 uint8_t vpd_flag; /* VPD data flag */
994
995 #define VPD_MODEL_DESC 0x1 /* valid vpd model description */
996 #define VPD_MODEL_NAME 0x2 /* valid vpd model name */
997 #define VPD_PROGRAM_TYPE 0x4 /* valid vpd program type */
998 #define VPD_PORT 0x8 /* valid vpd port data */
999 #define VPD_MASK 0xf /* mask for any vpd data */
1000
1001 uint8_t soft_wwn_enable;
1002
1003 struct timer_list fcp_poll_timer;
1004 struct timer_list eratt_poll;
1005 uint32_t eratt_poll_interval;
1006
1007 uint64_t bg_guard_err_cnt;
1008 uint64_t bg_apptag_err_cnt;
1009 uint64_t bg_reftag_err_cnt;
1010
1011 /* fastpath list. */
1012 spinlock_t scsi_buf_list_get_lock; /* SCSI buf alloc list lock */
1013 spinlock_t scsi_buf_list_put_lock; /* SCSI buf free list lock */
1014 struct list_head lpfc_scsi_buf_list_get;
1015 struct list_head lpfc_scsi_buf_list_put;
1016 uint32_t total_scsi_bufs;
1017 struct list_head lpfc_iocb_list;
1018 uint32_t total_iocbq_bufs;
1019 struct list_head active_rrq_list;
1020 spinlock_t hbalock;
1021
1022 /* dma_mem_pools */
1023 struct dma_pool *lpfc_sg_dma_buf_pool;
1024 struct dma_pool *lpfc_mbuf_pool;
1025 struct dma_pool *lpfc_hrb_pool; /* header receive buffer pool */
1026 struct dma_pool *lpfc_drb_pool; /* data receive buffer pool */
1027 struct dma_pool *lpfc_nvmet_drb_pool; /* data receive buffer pool */
1028 struct dma_pool *lpfc_hbq_pool; /* SLI3 hbq buffer pool */
1029 struct dma_pool *lpfc_cmd_rsp_buf_pool;
1030 struct lpfc_dma_pool lpfc_mbuf_safety_pool;
1031
1032 mempool_t *mbox_mem_pool;
1033 mempool_t *nlp_mem_pool;
1034 mempool_t *rrq_pool;
1035 mempool_t *active_rrq_pool;
1036
1037 struct fc_host_statistics link_stats;
1038 enum lpfc_irq_chann_mode irq_chann_mode;
1039 enum intr_type_t intr_type;
1040 uint32_t intr_mode;
1041 #define LPFC_INTR_ERROR 0xFFFFFFFF
1042 struct list_head port_list;
1043 spinlock_t port_list_lock; /* lock for port_list mutations */
1044 struct lpfc_vport *pport; /* physical lpfc_vport pointer */
1045 uint16_t max_vpi; /* Maximum virtual nports */
1046 #define LPFC_MAX_VPI 0xFF /* Max number VPI supported 0 - 0xff */
1047 #define LPFC_MAX_VPORTS 0x100 /* Max vports per port, with pport */
1048 uint16_t max_vports; /*
1049 * For IOV HBAs max_vpi can change
1050 * after a reset. max_vports is max
1051 * number of vports present. This can
1052 * be greater than max_vpi.
1053 */
1054 uint16_t vpi_base;
1055 uint16_t vfi_base;
1056 unsigned long *vpi_bmask; /* vpi allocation table */
1057 uint16_t *vpi_ids;
1058 uint16_t vpi_count;
1059 struct list_head lpfc_vpi_blk_list;
1060
1061 /* Data structure used by fabric iocb scheduler */
1062 struct list_head fabric_iocb_list;
1063 atomic_t fabric_iocb_count;
1064 struct timer_list fabric_block_timer;
1065 unsigned long bit_flags;
1066 #define FABRIC_COMANDS_BLOCKED 0
1067 atomic_t num_rsrc_err;
1068 atomic_t num_cmd_success;
1069 unsigned long last_rsrc_error_time;
1070 unsigned long last_ramp_down_time;
1071 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
1072 struct dentry *hba_debugfs_root;
1073 atomic_t debugfs_vport_count;
1074 struct dentry *debug_multixri_pools;
1075 struct dentry *debug_hbqinfo;
1076 struct dentry *debug_dumpHostSlim;
1077 struct dentry *debug_dumpHBASlim;
1078 struct dentry *debug_InjErrLBA; /* LBA to inject errors at */
1079 struct dentry *debug_InjErrNPortID; /* NPortID to inject errors at */
1080 struct dentry *debug_InjErrWWPN; /* WWPN to inject errors at */
1081 struct dentry *debug_writeGuard; /* inject write guard_tag errors */
1082 struct dentry *debug_writeApp; /* inject write app_tag errors */
1083 struct dentry *debug_writeRef; /* inject write ref_tag errors */
1084 struct dentry *debug_readGuard; /* inject read guard_tag errors */
1085 struct dentry *debug_readApp; /* inject read app_tag errors */
1086 struct dentry *debug_readRef; /* inject read ref_tag errors */
1087
1088 struct dentry *debug_nvmeio_trc;
1089 struct lpfc_debugfs_nvmeio_trc *nvmeio_trc;
1090 struct dentry *debug_hdwqinfo;
1091 #ifdef LPFC_HDWQ_LOCK_STAT
1092 struct dentry *debug_lockstat;
1093 #endif
1094 struct dentry *debug_ras_log;
1095 atomic_t nvmeio_trc_cnt;
1096 uint32_t nvmeio_trc_size;
1097 uint32_t nvmeio_trc_output_idx;
1098
1099 /* T10 DIF error injection */
1100 uint32_t lpfc_injerr_wgrd_cnt;
1101 uint32_t lpfc_injerr_wapp_cnt;
1102 uint32_t lpfc_injerr_wref_cnt;
1103 uint32_t lpfc_injerr_rgrd_cnt;
1104 uint32_t lpfc_injerr_rapp_cnt;
1105 uint32_t lpfc_injerr_rref_cnt;
1106 uint32_t lpfc_injerr_nportid;
1107 struct lpfc_name lpfc_injerr_wwpn;
1108 sector_t lpfc_injerr_lba;
1109 #define LPFC_INJERR_LBA_OFF (sector_t)(-1)
1110
1111 struct dentry *debug_slow_ring_trc;
1112 struct lpfc_debugfs_trc *slow_ring_trc;
1113 atomic_t slow_ring_trc_cnt;
1114 /* iDiag debugfs sub-directory */
1115 struct dentry *idiag_root;
1116 struct dentry *idiag_pci_cfg;
1117 struct dentry *idiag_bar_acc;
1118 struct dentry *idiag_que_info;
1119 struct dentry *idiag_que_acc;
1120 struct dentry *idiag_drb_acc;
1121 struct dentry *idiag_ctl_acc;
1122 struct dentry *idiag_mbx_acc;
1123 struct dentry *idiag_ext_acc;
1124 uint8_t lpfc_idiag_last_eq;
1125 #endif
1126 uint16_t nvmeio_trc_on;
1127
1128 /* Used for deferred freeing of ELS data buffers */
1129 struct list_head elsbuf;
1130 int elsbuf_cnt;
1131 int elsbuf_prev_cnt;
1132
1133 uint8_t temp_sensor_support;
1134 /* Fields used for heart beat. */
1135 unsigned long last_completion_time;
1136 unsigned long skipped_hb;
1137 struct timer_list hb_tmofunc;
1138 uint8_t hb_outstanding;
1139 struct timer_list rrq_tmr;
1140 enum hba_temp_state over_temp_state;
1141 /* ndlp reference management */
1142 spinlock_t ndlp_lock;
1143 /*
1144 * Following bit will be set for all buffer tags which are not
1145 * associated with any HBQ.
1146 */
1147 #define QUE_BUFTAG_BIT (1<<31)
1148 uint32_t buffer_tag_count;
1149 int wait_4_mlo_maint_flg;
1150 wait_queue_head_t wait_4_mlo_m_q;
1151 /* data structure used for latency data collection */
1152 #define LPFC_NO_BUCKET 0
1153 #define LPFC_LINEAR_BUCKET 1
1154 #define LPFC_POWER2_BUCKET 2
1155 uint8_t bucket_type;
1156 uint32_t bucket_base;
1157 uint32_t bucket_step;
1158
1159 /* Maximum number of events that can be outstanding at any time*/
1160 #define LPFC_MAX_EVT_COUNT 512
1161 atomic_t fast_event_count;
1162 uint32_t fcoe_eventtag;
1163 uint32_t fcoe_eventtag_at_fcf_scan;
1164 uint32_t fcoe_cvl_eventtag;
1165 uint32_t fcoe_cvl_eventtag_attn;
1166 struct lpfc_fcf fcf;
1167 uint8_t fc_map[3];
1168 uint8_t valid_vlan;
1169 uint16_t vlan_id;
1170 struct list_head fcf_conn_rec_list;
1171
1172 bool defer_flogi_acc_flag;
1173 uint16_t defer_flogi_acc_rx_id;
1174 uint16_t defer_flogi_acc_ox_id;
1175
1176 spinlock_t ct_ev_lock; /* synchronize access to ct_ev_waiters */
1177 struct list_head ct_ev_waiters;
1178 struct unsol_rcv_ct_ctx ct_ctx[LPFC_CT_CTX_MAX];
1179 uint32_t ctx_idx;
1180
1181 /* RAS Support */
1182 struct lpfc_ras_fwlog ras_fwlog;
1183
1184 uint8_t menlo_flag; /* menlo generic flags */
1185 #define HBA_MENLO_SUPPORT 0x1 /* HBA supports menlo commands */
1186 uint32_t iocb_cnt;
1187 uint32_t iocb_max;
1188 atomic_t sdev_cnt;
1189 spinlock_t devicelock; /* lock for luns list */
1190 mempool_t *device_data_mem_pool;
1191 struct list_head luns;
1192 #define LPFC_TRANSGRESSION_HIGH_TEMPERATURE 0x0080
1193 #define LPFC_TRANSGRESSION_LOW_TEMPERATURE 0x0040
1194 #define LPFC_TRANSGRESSION_HIGH_VOLTAGE 0x0020
1195 #define LPFC_TRANSGRESSION_LOW_VOLTAGE 0x0010
1196 #define LPFC_TRANSGRESSION_HIGH_TXBIAS 0x0008
1197 #define LPFC_TRANSGRESSION_LOW_TXBIAS 0x0004
1198 #define LPFC_TRANSGRESSION_HIGH_TXPOWER 0x0002
1199 #define LPFC_TRANSGRESSION_LOW_TXPOWER 0x0001
1200 #define LPFC_TRANSGRESSION_HIGH_RXPOWER 0x8000
1201 #define LPFC_TRANSGRESSION_LOW_RXPOWER 0x4000
1202 uint16_t sfp_alarm;
1203 uint16_t sfp_warning;
1204
1205 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
1206 uint16_t hdwqstat_on;
1207 #define LPFC_CHECK_OFF 0
1208 #define LPFC_CHECK_NVME_IO 1
1209 #define LPFC_CHECK_NVMET_IO 2
1210 #define LPFC_CHECK_SCSI_IO 4
1211 uint16_t ktime_on;
1212 uint64_t ktime_data_samples;
1213 uint64_t ktime_status_samples;
1214 uint64_t ktime_last_cmd;
1215 uint64_t ktime_seg1_total;
1216 uint64_t ktime_seg1_min;
1217 uint64_t ktime_seg1_max;
1218 uint64_t ktime_seg2_total;
1219 uint64_t ktime_seg2_min;
1220 uint64_t ktime_seg2_max;
1221 uint64_t ktime_seg3_total;
1222 uint64_t ktime_seg3_min;
1223 uint64_t ktime_seg3_max;
1224 uint64_t ktime_seg4_total;
1225 uint64_t ktime_seg4_min;
1226 uint64_t ktime_seg4_max;
1227 uint64_t ktime_seg5_total;
1228 uint64_t ktime_seg5_min;
1229 uint64_t ktime_seg5_max;
1230 uint64_t ktime_seg6_total;
1231 uint64_t ktime_seg6_min;
1232 uint64_t ktime_seg6_max;
1233 uint64_t ktime_seg7_total;
1234 uint64_t ktime_seg7_min;
1235 uint64_t ktime_seg7_max;
1236 uint64_t ktime_seg8_total;
1237 uint64_t ktime_seg8_min;
1238 uint64_t ktime_seg8_max;
1239 uint64_t ktime_seg9_total;
1240 uint64_t ktime_seg9_min;
1241 uint64_t ktime_seg9_max;
1242 uint64_t ktime_seg10_total;
1243 uint64_t ktime_seg10_min;
1244 uint64_t ktime_seg10_max;
1245 #endif
1246
1247 struct hlist_node cpuhp; /* used for cpuhp per hba callback */
1248 struct timer_list cpuhp_poll_timer;
1249 struct list_head poll_list; /* slowpath eq polling list */
1250 #define LPFC_POLL_HB 1 /* slowpath heartbeat */
1251 #define LPFC_POLL_FASTPATH 0 /* called from fastpath */
1252 #define LPFC_POLL_SLOWPATH 1 /* called from slowpath */
1253
1254 char os_host_name[MAXHOSTNAMELEN];
1255
1256 /* SCSI host template information - for physical port */
1257 struct scsi_host_template port_template;
1258 /* SCSI host template information - for all vports */
1259 struct scsi_host_template vport_template;
1260 atomic_t dbg_log_idx;
1261 atomic_t dbg_log_cnt;
1262 atomic_t dbg_log_dmping;
1263 struct dbg_log_ent dbg_log[DBG_LOG_SZ];
1264 };
1265
1266 static inline struct Scsi_Host *
lpfc_shost_from_vport(struct lpfc_vport * vport)1267 lpfc_shost_from_vport(struct lpfc_vport *vport)
1268 {
1269 return container_of((void *) vport, struct Scsi_Host, hostdata[0]);
1270 }
1271
1272 static inline void
lpfc_set_loopback_flag(struct lpfc_hba * phba)1273 lpfc_set_loopback_flag(struct lpfc_hba *phba)
1274 {
1275 if (phba->cfg_topology == FLAGS_LOCAL_LB)
1276 phba->link_flag |= LS_LOOPBACK_MODE;
1277 else
1278 phba->link_flag &= ~LS_LOOPBACK_MODE;
1279 }
1280
1281 static inline int
lpfc_is_link_up(struct lpfc_hba * phba)1282 lpfc_is_link_up(struct lpfc_hba *phba)
1283 {
1284 return phba->link_state == LPFC_LINK_UP ||
1285 phba->link_state == LPFC_CLEAR_LA ||
1286 phba->link_state == LPFC_HBA_READY;
1287 }
1288
1289 static inline void
lpfc_worker_wake_up(struct lpfc_hba * phba)1290 lpfc_worker_wake_up(struct lpfc_hba *phba)
1291 {
1292 /* Set the lpfc data pending flag */
1293 set_bit(LPFC_DATA_READY, &phba->data_flags);
1294
1295 /* Wake up worker thread */
1296 wake_up(&phba->work_waitq);
1297 return;
1298 }
1299
1300 static inline int
lpfc_readl(void __iomem * addr,uint32_t * data)1301 lpfc_readl(void __iomem *addr, uint32_t *data)
1302 {
1303 uint32_t temp;
1304 temp = readl(addr);
1305 if (temp == 0xffffffff)
1306 return -EIO;
1307 *data = temp;
1308 return 0;
1309 }
1310
1311 static inline int
lpfc_sli_read_hs(struct lpfc_hba * phba)1312 lpfc_sli_read_hs(struct lpfc_hba *phba)
1313 {
1314 /*
1315 * There was a link/board error. Read the status register to retrieve
1316 * the error event and process it.
1317 */
1318 phba->sli.slistat.err_attn_event++;
1319
1320 /* Save status info and check for unplug error */
1321 if (lpfc_readl(phba->HSregaddr, &phba->work_hs) ||
1322 lpfc_readl(phba->MBslimaddr + 0xa8, &phba->work_status[0]) ||
1323 lpfc_readl(phba->MBslimaddr + 0xac, &phba->work_status[1])) {
1324 return -EIO;
1325 }
1326
1327 /* Clear chip Host Attention error bit */
1328 writel(HA_ERATT, phba->HAregaddr);
1329 readl(phba->HAregaddr); /* flush */
1330 phba->pport->stopped = 1;
1331
1332 return 0;
1333 }
1334
1335 static inline struct lpfc_sli_ring *
lpfc_phba_elsring(struct lpfc_hba * phba)1336 lpfc_phba_elsring(struct lpfc_hba *phba)
1337 {
1338 /* Return NULL if sli_rev has become invalid due to bad fw */
1339 if (phba->sli_rev != LPFC_SLI_REV4 &&
1340 phba->sli_rev != LPFC_SLI_REV3 &&
1341 phba->sli_rev != LPFC_SLI_REV2)
1342 return NULL;
1343
1344 if (phba->sli_rev == LPFC_SLI_REV4) {
1345 if (phba->sli4_hba.els_wq)
1346 return phba->sli4_hba.els_wq->pring;
1347 else
1348 return NULL;
1349 }
1350 return &phba->sli.sli3_ring[LPFC_ELS_RING];
1351 }
1352
1353 /**
1354 * lpfc_next_online_cpu - Finds next online CPU on cpumask
1355 * @mask: Pointer to phba's cpumask member.
1356 * @start: starting cpu index
1357 *
1358 * Note: If no valid cpu found, then nr_cpu_ids is returned.
1359 *
1360 **/
1361 static inline unsigned int
lpfc_next_online_cpu(const struct cpumask * mask,unsigned int start)1362 lpfc_next_online_cpu(const struct cpumask *mask, unsigned int start)
1363 {
1364 unsigned int cpu_it;
1365
1366 for_each_cpu_wrap(cpu_it, mask, start) {
1367 if (cpu_online(cpu_it))
1368 break;
1369 }
1370
1371 return cpu_it;
1372 }
1373 /**
1374 * lpfc_sli4_mod_hba_eq_delay - update EQ delay
1375 * @phba: Pointer to HBA context object.
1376 * @q: The Event Queue to update.
1377 * @delay: The delay value (in us) to be written.
1378 *
1379 **/
1380 static inline void
lpfc_sli4_mod_hba_eq_delay(struct lpfc_hba * phba,struct lpfc_queue * eq,u32 delay)1381 lpfc_sli4_mod_hba_eq_delay(struct lpfc_hba *phba, struct lpfc_queue *eq,
1382 u32 delay)
1383 {
1384 struct lpfc_register reg_data;
1385
1386 reg_data.word0 = 0;
1387 bf_set(lpfc_sliport_eqdelay_id, ®_data, eq->queue_id);
1388 bf_set(lpfc_sliport_eqdelay_delay, ®_data, delay);
1389 writel(reg_data.word0, phba->sli4_hba.u.if_type2.EQDregaddr);
1390 eq->q_mode = delay;
1391 }
1392
1393
1394 /*
1395 * Macro that declares tables and a routine to perform enum type to
1396 * ascii string lookup.
1397 *
1398 * Defines a <key,value> table for an enum. Uses xxx_INIT defines for
1399 * the enum to populate the table. Macro defines a routine (named
1400 * by caller) that will search all elements of the table for the key
1401 * and return the name string if found or "Unrecognized" if not found.
1402 */
1403 #define DECLARE_ENUM2STR_LOOKUP(routine, enum_name, enum_init) \
1404 static struct { \
1405 enum enum_name value; \
1406 char *name; \
1407 } fc_##enum_name##_e2str_names[] = enum_init; \
1408 static const char *routine(enum enum_name table_key) \
1409 { \
1410 int i; \
1411 char *name = "Unrecognized"; \
1412 \
1413 for (i = 0; i < ARRAY_SIZE(fc_##enum_name##_e2str_names); i++) {\
1414 if (fc_##enum_name##_e2str_names[i].value == table_key) {\
1415 name = fc_##enum_name##_e2str_names[i].name; \
1416 break; \
1417 } \
1418 } \
1419 return name; \
1420 }
1421