1 /* Copyright 2012-17 Advanced Micro Devices, Inc. 2 * 3 * Permission is hereby granted, free of charge, to any person obtaining a 4 * copy of this software and associated documentation files (the "Software"), 5 * to deal in the Software without restriction, including without limitation 6 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 7 * and/or sell copies of the Software, and to permit persons to whom the 8 * Software is furnished to do so, subject to the following conditions: 9 * 10 * The above copyright notice and this permission notice shall be included in 11 * all copies or substantial portions of the Software. 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 15 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 16 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 17 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 18 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 19 * OTHER DEALINGS IN THE SOFTWARE. 20 * 21 * Authors: AMD 22 * 23 */ 24 25 #ifndef __DC_MCIF_WB_H__ 26 #define __DC_MCIF_WB_H__ 27 28 #include "dc_hw_types.h" 29 30 31 enum mmhubbub_wbif_mode { 32 PACKED_444 = 0, 33 PACKED_444_FP16 = 1, 34 PLANAR_420_8BPC = 2, 35 PLANAR_420_10BPC = 3 36 }; 37 38 struct mcif_arb_params { 39 40 unsigned int time_per_pixel; 41 unsigned int cli_watermark[4]; 42 unsigned int pstate_watermark[4]; 43 unsigned int arbitration_slice; 44 unsigned int slice_lines; 45 unsigned int max_scaled_time; 46 #if defined(CONFIG_DRM_AMD_DC_DCN3_0) 47 unsigned int dram_speed_change_duration; 48 #endif 49 }; 50 51 struct mcif_irq_params { 52 unsigned int sw_int_en; 53 unsigned int sw_slice_int_en; 54 unsigned int sw_overrun_int_en; 55 unsigned int vce_int_en; 56 unsigned int vce_slice_int_en; 57 }; 58 59 60 /* / - mcif_wb_frame_dump_info is the info of the dumping WB data */ 61 struct mcif_wb_frame_dump_info { 62 unsigned int size; 63 unsigned int width; 64 unsigned int height; 65 unsigned int luma_pitch; 66 unsigned int chroma_pitch; 67 enum dwb_scaler_mode format; 68 }; 69 70 struct mcif_wb { 71 const struct mcif_wb_funcs *funcs; 72 struct dc_context *ctx; 73 int inst; 74 }; 75 76 struct mcif_wb_funcs { 77 78 #if defined(CONFIG_DRM_AMD_DC_DCN3_0) 79 void (*warmup_mcif)( 80 struct mcif_wb *mcif_wb, 81 struct mcif_warmup_params *params); 82 #endif 83 void (*enable_mcif)(struct mcif_wb *mcif_wb); 84 85 void (*disable_mcif)(struct mcif_wb *mcif_wb); 86 87 void (*config_mcif_buf)( 88 struct mcif_wb *mcif_wb, 89 struct mcif_buf_params *params, 90 unsigned int dest_height); 91 92 void (*config_mcif_arb)( 93 struct mcif_wb *mcif_wb, 94 struct mcif_arb_params *params); 95 96 void (*config_mcif_irq)( 97 struct mcif_wb *mcif_wb, 98 struct mcif_irq_params *params); 99 100 void (*dump_frame)( 101 struct mcif_wb *mcif_wb, 102 struct mcif_buf_params *mcif_params, 103 enum dwb_scaler_mode out_format, 104 unsigned int dest_width, 105 unsigned int dest_height, 106 struct mcif_wb_frame_dump_info *dump_info, 107 unsigned char *luma_buffer, 108 unsigned char *chroma_buffer, 109 unsigned char *dest_luma_buffer, 110 unsigned char *dest_chroma_buffer); 111 }; 112 113 #endif 114