• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Support for Intel Camera Imaging ISP subsystem.
4  * Copyright (c) 2015, Intel Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms and conditions of the GNU General Public License,
8  * version 2, as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  */
15 
16 /* CSI reveiver has 3 ports. */
17 #define		N_CSI_PORTS (3)
18 
19 #include "system_local.h"
20 #include "isys_dma_global.h"	/*	isys2401_dma_channel,
21 				 *	isys2401_dma_cfg_t
22 				 */
23 
24 #include "ibuf_ctrl_local.h"	/*	ibuf_cfg_t,
25 				 *	ibuf_ctrl_cfg_t
26 				 */
27 
28 #include "isys_stream2mmio.h"	/*	stream2mmio_cfg_t */
29 
30 #include "csi_rx.h"		/*	csi_rx_frontend_cfg_t,
31 				 *	csi_rx_backend_cfg_t,
32 				 *	csi_rx_backend_lut_entry_t
33 				 */
34 #include "pixelgen.h"
35 
36 #define INPUT_SYSTEM_N_STREAM_ID  6	/* maximum number of simultaneous
37 					virtual channels supported*/
38 
39 typedef enum {
40 	INPUT_SYSTEM_SOURCE_TYPE_UNDEFINED = 0,
41 	INPUT_SYSTEM_SOURCE_TYPE_SENSOR,
42 	INPUT_SYSTEM_SOURCE_TYPE_TPG,
43 	INPUT_SYSTEM_SOURCE_TYPE_PRBS,
44 	N_INPUT_SYSTEM_SOURCE_TYPE
45 } input_system_source_type_t;
46 
47 typedef enum {
48 	INPUT_SYSTEM_POLL_ON_WAIT_FOR_FRAME,
49 	INPUT_SYSTEM_POLL_ON_CAPTURE_REQUEST,
50 } input_system_polling_mode_t;
51 
52 typedef struct input_system_channel_s input_system_channel_t;
53 struct input_system_channel_s {
54 	stream2mmio_ID_t	stream2mmio_id;
55 	stream2mmio_sid_ID_t	stream2mmio_sid_id;
56 
57 	ibuf_ctrl_ID_t		ibuf_ctrl_id;
58 	isp2401_ib_buffer_t	ib_buffer;
59 
60 	isys2401_dma_ID_t	dma_id;
61 	isys2401_dma_channel	dma_channel;
62 };
63 
64 typedef struct input_system_channel_cfg_s input_system_channel_cfg_t;
65 struct input_system_channel_cfg_s {
66 	stream2mmio_cfg_t	stream2mmio_cfg;
67 	ibuf_ctrl_cfg_t		ibuf_ctrl_cfg;
68 	isys2401_dma_cfg_t	dma_cfg;
69 	isys2401_dma_port_cfg_t	dma_src_port_cfg;
70 	isys2401_dma_port_cfg_t	dma_dest_port_cfg;
71 };
72 
73 typedef struct input_system_input_port_s input_system_input_port_t;
74 struct input_system_input_port_s {
75 	input_system_source_type_t	source_type;
76 
77 	struct {
78 		csi_rx_frontend_ID_t		frontend_id;
79 		csi_rx_backend_ID_t		backend_id;
80 		csi_mipi_packet_type_t		packet_type;
81 		csi_rx_backend_lut_entry_t	backend_lut_entry;
82 	} csi_rx;
83 
84 	struct {
85 		csi_mipi_packet_type_t		packet_type;
86 		csi_rx_backend_lut_entry_t	backend_lut_entry;
87 	} metadata;
88 
89 	struct {
90 		pixelgen_ID_t			pixelgen_id;
91 	} pixelgen;
92 };
93 
94 typedef struct input_system_input_port_cfg_s input_system_input_port_cfg_t;
95 struct input_system_input_port_cfg_s {
96 	struct {
97 		csi_rx_frontend_cfg_t	frontend_cfg;
98 		csi_rx_backend_cfg_t	backend_cfg;
99 		csi_rx_backend_cfg_t	md_backend_cfg;
100 	} csi_rx_cfg;
101 
102 	struct {
103 		pixelgen_tpg_cfg_t	tpg_cfg;
104 		pixelgen_prbs_cfg_t	prbs_cfg;
105 	} pixelgen_cfg;
106 };
107 
108 typedef struct isp2401_input_system_cfg_s isp2401_input_system_cfg_t;
109 struct isp2401_input_system_cfg_s {
110 	input_system_input_port_ID_t	input_port_id;
111 
112 	input_system_source_type_t	mode;
113 
114 	/* ISP2401 */
115 	input_system_polling_mode_t	polling_mode;
116 
117 	bool online;
118 	bool raw_packed;
119 	s8 linked_isys_stream_id;
120 
121 	struct {
122 		bool	comp_enable;
123 		s32	active_lanes;
124 		s32	fmt_type;
125 		s32	ch_id;
126 		s32 comp_predictor;
127 		s32 comp_scheme;
128 	} csi_port_attr;
129 
130 	pixelgen_tpg_cfg_t	tpg_port_attr;
131 
132 	pixelgen_prbs_cfg_t prbs_port_attr;
133 
134 	struct {
135 		s32 align_req_in_bytes;
136 		s32 bits_per_pixel;
137 		s32 pixels_per_line;
138 		s32 lines_per_frame;
139 	} input_port_resolution;
140 
141 	struct {
142 		s32 left_padding;
143 		s32 max_isp_input_width;
144 	} output_port_attr;
145 
146 	struct {
147 		bool    enable;
148 		s32 fmt_type;
149 		s32 align_req_in_bytes;
150 		s32 bits_per_pixel;
151 		s32 pixels_per_line;
152 		s32 lines_per_frame;
153 	} metadata;
154 };
155 
156 typedef struct virtual_input_system_stream_s virtual_input_system_stream_t;
157 struct virtual_input_system_stream_s {
158 	u32 id;				/*Used when multiple MIPI data types and/or virtual channels are used.
159 								Must be unique within one CSI RX
160 								and lower than SH_CSS_MAX_ISYS_CHANNEL_NODES */
161 	u8 enable_metadata;
162 	input_system_input_port_t	input_port;
163 	input_system_channel_t		channel;
164 	input_system_channel_t		md_channel; /* metadata channel */
165 	u8 online;
166 	s8 linked_isys_stream_id;
167 	u8 valid;
168 
169 	/* ISP2401 */
170 	input_system_polling_mode_t	polling_mode;
171 	s32 subscr_index;
172 };
173 
174 typedef struct virtual_input_system_stream_cfg_s
175 	virtual_input_system_stream_cfg_t;
176 struct virtual_input_system_stream_cfg_s {
177 	u8 enable_metadata;
178 	input_system_input_port_cfg_t	input_port_cfg;
179 	input_system_channel_cfg_t	channel_cfg;
180 	input_system_channel_cfg_t	md_channel_cfg;
181 	u8 valid;
182 };
183 
184 #define ISP_INPUT_BUF_START_ADDR	0
185 #define NUM_OF_INPUT_BUF		2
186 #define NUM_OF_LINES_PER_BUF		2
187 #define LINES_OF_ISP_INPUT_BUF		(NUM_OF_INPUT_BUF * NUM_OF_LINES_PER_BUF)
188 #define ISP_INPUT_BUF_STRIDE		SH_CSS_MAX_SENSOR_WIDTH
189