Home
last modified time | relevance | path

Searched refs:AR_PHY_CLC_TBL1 (Results 1 – 2 of 2) sorted by relevance

/drivers/net/wireless/ath/ath9k/
Dphy.h34 #define AR_PHY_CLC_TBL1 0xa35c macro
Dar9002_calib.c817 reg_clc_I0 = (REG_READ(ah, (AR_PHY_CLC_TBL1 + (i << 2))) in ar9285_hw_clc()
819 reg_clc_Q0 = (REG_READ(ah, (AR_PHY_CLC_TBL1 + (i << 2))) in ar9285_hw_clc()