Searched refs:B43_PHY_OFDM (Results 1 – 9 of 9) sorted by relevance
/drivers/net/wireless/broadcom/b43/ |
D | phy_lp.h | 94 #define B43_LPPHY_VERSION B43_PHY_OFDM(0x00) /* Version */ 95 #define B43_LPPHY_BBCONFIG B43_PHY_OFDM(0x01) /* BBConfig */ 96 #define B43_LPPHY_RX_STAT0 B43_PHY_OFDM(0x04) /* RX Status0 */ 97 #define B43_LPPHY_RX_STAT1 B43_PHY_OFDM(0x05) /* RX Status1 */ 98 #define B43_LPPHY_TX_ERROR B43_PHY_OFDM(0x07) /* TX Error */ 99 #define B43_LPPHY_CHANNEL B43_PHY_OFDM(0x08) /* Channel */ 100 #define B43_LPPHY_WORKAROUND B43_PHY_OFDM(0x09) /* workaround */ 101 #define B43_LPPHY_FOURWIRE_ADDR B43_PHY_OFDM(0x0B) /* Fourwire Address */ 102 #define B43_LPPHY_FOURWIREDATAHI B43_PHY_OFDM(0x0C) /* FourwireDataHi */ 103 #define B43_LPPHY_FOURWIREDATALO B43_PHY_OFDM(0x0D) /* FourwireDataLo */ [all …]
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D | phy_a.h | 9 #define B43_PHY_VERSION_OFDM B43_PHY_OFDM(0x00) /* Versioning register for A-PHY */ 10 #define B43_PHY_BBANDCFG B43_PHY_OFDM(0x01) /* Baseband config */ 13 #define B43_PHY_PWRDOWN B43_PHY_OFDM(0x03) /* Powerdown */ 14 #define B43_PHY_CRSTHRES1_R1 B43_PHY_OFDM(0x06) /* CRS Threshold 1 (phy.rev 1 only) */ 15 #define B43_PHY_LNAHPFCTL B43_PHY_OFDM(0x1C) /* LNA/HPF control */ 16 #define B43_PHY_LPFGAINCTL B43_PHY_OFDM(0x20) /* LPF Gain control */ 17 #define B43_PHY_ADIVRELATED B43_PHY_OFDM(0x27) /* FIXME rename */ 18 #define B43_PHY_CRS0 B43_PHY_OFDM(0x29) 20 #define B43_PHY_PEAK_COUNT B43_PHY_OFDM(0x30) 21 #define B43_PHY_ANTDWELL B43_PHY_OFDM(0x2B) /* Antenna dwell */ [all …]
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D | phy_lcn.h | 8 #define B43_PHY_LCN_AFE_CTL1 B43_PHY_OFDM(0x03B) 9 #define B43_PHY_LCN_AFE_CTL2 B43_PHY_OFDM(0x03C) 10 #define B43_PHY_LCN_RF_CTL1 B43_PHY_OFDM(0x04C) 11 #define B43_PHY_LCN_RF_CTL2 B43_PHY_OFDM(0x04D) 12 #define B43_PHY_LCN_TABLE_ADDR B43_PHY_OFDM(0x055) /* Table address */ 13 #define B43_PHY_LCN_TABLE_DATALO B43_PHY_OFDM(0x056) /* Table data low */ 14 #define B43_PHY_LCN_TABLE_DATAHI B43_PHY_OFDM(0x057) /* Table data high */ 15 #define B43_PHY_LCN_RF_CTL3 B43_PHY_OFDM(0x0B0) 16 #define B43_PHY_LCN_RF_CTL4 B43_PHY_OFDM(0x0B1) 17 #define B43_PHY_LCN_RF_CTL5 B43_PHY_OFDM(0x0B7) [all …]
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D | wa.c | 168 b43_phy_write(dev, B43_PHY_OFDM(0xC9), 0x0080); in b43_wa_crs_ed() 180 b43_phy_write(dev, B43_PHY_OFDM(0x2C), 0x005A); in b43_wa_crs_blank() 233 b43_phy_maskset(dev, B43_PHY_OFDM(0x1A), ~0x007F, 0x000F); in b43_wa_altagc() 234 b43_phy_maskset(dev, B43_PHY_OFDM(0x1A), ~0x3F80, 0x2B80); in b43_wa_altagc() 244 b43_phy_maskset(dev, B43_PHY_OFDM(0x88), ~0x00FF, 0x001C); in b43_wa_altagc() 245 b43_phy_maskset(dev, B43_PHY_OFDM(0x88), ~0x3F00, 0x0200); in b43_wa_altagc() 246 b43_phy_maskset(dev, B43_PHY_OFDM(0x96), ~0x00FF, 0x001C); in b43_wa_altagc() 247 b43_phy_maskset(dev, B43_PHY_OFDM(0x89), ~0x00FF, 0x0020); in b43_wa_altagc() 248 b43_phy_maskset(dev, B43_PHY_OFDM(0x89), ~0x3F00, 0x0200); in b43_wa_altagc() 249 b43_phy_maskset(dev, B43_PHY_OFDM(0x82), ~0x00FF, 0x002E); in b43_wa_altagc() [all …]
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D | phy_lp.c | 349 B43_PHY_OFDM(0xC1), in lpphy_save_dig_flt_state() 350 B43_PHY_OFDM(0xC2), in lpphy_save_dig_flt_state() 351 B43_PHY_OFDM(0xC3), in lpphy_save_dig_flt_state() 352 B43_PHY_OFDM(0xC4), in lpphy_save_dig_flt_state() 353 B43_PHY_OFDM(0xC5), in lpphy_save_dig_flt_state() 354 B43_PHY_OFDM(0xC6), in lpphy_save_dig_flt_state() 355 B43_PHY_OFDM(0xC7), in lpphy_save_dig_flt_state() 356 B43_PHY_OFDM(0xC8), in lpphy_save_dig_flt_state() 357 B43_PHY_OFDM(0xCF), in lpphy_save_dig_flt_state() 378 B43_PHY_OFDM(0xC1), in lpphy_restore_dig_flt_state() [all …]
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D | phy_ht.h | 68 #define B43_PHY_HT_C1_CLIP1THRES B43_PHY_OFDM(0x00E) 69 #define B43_PHY_HT_C2_CLIP1THRES B43_PHY_OFDM(0x04E) 70 #define B43_PHY_HT_C3_CLIP1THRES B43_PHY_OFDM(0x08E)
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D | phy_ht.c | 946 b43_phy_maskset(dev, B43_PHY_OFDM(0x0141), 0xff00, 0x46); in b43_phy_ht_op_init() 957 b43_phy_maskset(dev, B43_PHY_OFDM(0x24), 0x3f, 0xd); in b43_phy_ht_op_init() 958 b43_phy_maskset(dev, B43_PHY_OFDM(0x64), 0x3f, 0xd); in b43_phy_ht_op_init() 959 b43_phy_maskset(dev, B43_PHY_OFDM(0xa4), 0x3f, 0xd); in b43_phy_ht_op_init()
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D | phy_common.h | 24 #define B43_PHY_OFDM(reg) ((reg) | B43_PHYROUTE_OFDM_GPHY) macro
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D | phy_g.c | 1994 b43_phy_maskset(dev, B43_PHY_OFDM(0x6E), 0xE000, 0x3CF); in b43_phy_inita() 2027 b43_phy_write(dev, B43_PHY_OFDM(0xC2), 0x1816); in b43_phy_initg() 2028 b43_phy_write(dev, B43_PHY_OFDM(0xC3), 0x8006); in b43_phy_initg() 2031 b43_phy_maskset(dev, B43_PHY_OFDM(0xCC), 0x00FF, 0x1F00); in b43_phy_initg() 2035 b43_phy_write(dev, B43_PHY_OFDM(0x7E), 0x78); in b43_phy_initg() 2038 b43_phy_set(dev, B43_PHY_OFDM(0x3E), 0x4); in b43_phy_initg() 2099 b43_phy_mask(dev, B43_PHY_OFDM(0xC3), 0x7FFF); in b43_phy_initg()
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