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Searched refs:CGTS_CU3_SP0_CTRL_REG__SP01_MASK (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_sh_mask.h9631 #define CGTS_CU3_SP0_CTRL_REG__SP01_MASK 0x7f0000 macro
Dgfx_8_0_sh_mask.h11355 #define CGTS_CU3_SP0_CTRL_REG__SP01_MASK 0x7f0000 macro
Dgfx_8_1_sh_mask.h11753 #define CGTS_CU3_SP0_CTRL_REG__SP01_MASK 0x7f0000 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h24250 #define CGTS_CU3_SP0_CTRL_REG__SP01_MASK … macro
Dgc_9_1_sh_mask.h25541 #define CGTS_CU3_SP0_CTRL_REG__SP01_MASK … macro
Dgc_9_2_1_sh_mask.h25672 #define CGTS_CU3_SP0_CTRL_REG__SP01_MASK … macro