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Searched refs:CG_UPLL_FUNC_CNTL_5 (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/radeon/
Dsid.h150 #define CG_UPLL_FUNC_CNTL_5 0x648 macro
Dsi.c7026 WREG32_P(CG_UPLL_FUNC_CNTL_5, 0, ~RESET_ANTI_MUX_MASK); in si_set_uvd_clocks()
/drivers/gpu/drm/amd/amdgpu/
Dsid.h151 #define CG_UPLL_FUNC_CNTL_5 0x192 macro
Dsi.c1684 WREG32_P(CG_UPLL_FUNC_CNTL_5, 0, ~RESET_ANTI_MUX_MASK); in si_set_uvd_clocks()