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Searched refs:CH7006_PLL_CONTROL (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/i2c/
Dch7006_mode.c284 regs[CH7006_PLL_CONTROL] |= CH7006_PLL_CONTROL_CAPACITOR; in ch7006_setup_pll()
286 regs[CH7006_PLL_CONTROL] &= ~CH7006_PLL_CONTROL_CAPACITOR; in ch7006_setup_pll()
430 ch7006_load_reg(client, state, CH7006_PLL_CONTROL); in ch7006_state_load()
464 ch7006_save_reg(client, state, CH7006_PLL_CONTROL); in ch7006_state_save()
Dch7006_drv.c166 regs[CH7006_PLL_CONTROL] = priv->saved_state.regs[CH7006_PLL_CONTROL]; in ch7006_encoder_mode_set()
Dch7006_priv.h321 #define CH7006_PLL_CONTROL 0x20 macro