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Searched refs:CLK_I2S1 (Results 1 – 15 of 15) sorted by relevance

/drivers/clk/zte/
Dclk-zx296702.c41 #define CLK_I2S1 (lsp0crpm_base + 0x20) macro
642 ARRAY_SIZE(i2s_wclk_sel), CLK_I2S1, 4, 1); in zx296702_lsp0_clocks_init()
644 zx_gate("i2s1_wclk", "i2s1_wclk_mux", CLK_I2S1, 1); in zx296702_lsp0_clocks_init()
646 zx_gate("i2s1_pclk", "lsp0_apb_pclk", CLK_I2S1, 0); in zx296702_lsp0_clocks_init()
/drivers/clk/sunxi-ng/
Dccu-sun8i-h3.c829 [CLK_I2S1] = &i2s1_clk.common.hw,
945 [CLK_I2S1] = &i2s1_clk.common.hw,
Dccu-sun8i-a23.c640 [CLK_I2S1] = &i2s1_clk.common.hw,
Dccu-sun8i-a33.c682 [CLK_I2S1] = &i2s1_clk.common.hw,
Dccu-sun8i-a83t.c768 [CLK_I2S1] = &i2s1_clk.common.hw,
Dccu-sun50i-a64.c821 [CLK_I2S1] = &i2s1_clk.common.hw,
Dccu-sun50i-h6.c1029 [CLK_I2S1] = &i2s1_clk.common.hw,
Dccu-sun9i-a80.c1024 [CLK_I2S1] = &i2s1_clk.common.hw,
Dccu-sun50i-a100.c1023 [CLK_I2S1] = &i2s1_clk.common.hw,
Dccu-sun8i-r40.c1112 [CLK_I2S1] = &i2s1_clk.common.hw,
Dccu-sun4i-a10.c1336 [CLK_I2S1] = &i2s1_clk.common.hw,
/drivers/clk/samsung/
Dclk-s5pv210.c582 GATE(CLK_I2S1, "i2s1", "dout_pclkp", CLK_GATE_IP3, 5, 0, 0),
Dclk-exynos5250.c591 GATE(CLK_I2S1, "i2s1", "div_aclk66", GATE_IP_PERIC, 20, 0, 0),
Dclk-exynos4.c882 GATE(CLK_I2S1, "i2s1", "aclk100", GATE_IP_PERIL, 20,
Dclk-exynos5420.c1085 GATE(CLK_I2S1, "i2s1", "mout_user_aclk66_peric",