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Searched refs:COMPUTE_PGM_RSRC1__VGPRS_MASK (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h1910 #define COMPUTE_PGM_RSRC1__VGPRS_MASK 0x0000003fL macro
Dgfx_7_2_sh_mask.h7513 #define COMPUTE_PGM_RSRC1__VGPRS_MASK 0x3f macro
Dgfx_8_0_sh_mask.h8301 #define COMPUTE_PGM_RSRC1__VGPRS_MASK 0x3f macro
Dgfx_8_1_sh_mask.h8855 #define COMPUTE_PGM_RSRC1__VGPRS_MASK 0x3f macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h10282 #define COMPUTE_PGM_RSRC1__VGPRS_MASK macro
Dgc_9_1_sh_mask.h11765 #define COMPUTE_PGM_RSRC1__VGPRS_MASK macro
Dgc_9_2_1_sh_mask.h11564 #define COMPUTE_PGM_RSRC1__VGPRS_MASK macro
Dgc_10_3_0_sh_mask.h15451 #define COMPUTE_PGM_RSRC1__VGPRS_MASK macro
Dgc_10_1_0_sh_mask.h17154 #define COMPUTE_PGM_RSRC1__VGPRS_MASK macro