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Searched refs:CP_CPC_IC_BASE_CNTL__VMID_MASK (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_8_0_sh_mask.h2501 #define CP_CPC_IC_BASE_CNTL__VMID_MASK 0xf macro
Dgfx_8_1_sh_mask.h3023 #define CP_CPC_IC_BASE_CNTL__VMID_MASK 0xf macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h11944 #define CP_CPC_IC_BASE_CNTL__VMID_MASK … macro
Dgc_9_1_sh_mask.h13374 #define CP_CPC_IC_BASE_CNTL__VMID_MASK … macro
Dgc_9_2_1_sh_mask.h13152 #define CP_CPC_IC_BASE_CNTL__VMID_MASK … macro
Dgc_10_3_0_sh_mask.h34683 #define CP_CPC_IC_BASE_CNTL__VMID_MASK … macro
Dgc_10_1_0_sh_mask.h39454 #define CP_CPC_IC_BASE_CNTL__VMID_MASK … macro