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Searched refs:CP_CPC_STATUS__QU_BUSY_MASK (Results 1 – 8 of 8) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_sh_mask.h2005 #define CP_CPC_STATUS__QU_BUSY_MASK 0x1000 macro
Dgfx_8_0_sh_mask.h2535 #define CP_CPC_STATUS__QU_BUSY_MASK 0x1000 macro
Dgfx_8_1_sh_mask.h3057 #define CP_CPC_STATUS__QU_BUSY_MASK 0x1000 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h603 #define CP_CPC_STATUS__QU_BUSY_MASK … macro
Dgc_9_1_sh_mask.h502 #define CP_CPC_STATUS__QU_BUSY_MASK … macro
Dgc_9_2_1_sh_mask.h491 #define CP_CPC_STATUS__QU_BUSY_MASK … macro
Dgc_10_3_0_sh_mask.h6281 #define CP_CPC_STATUS__QU_BUSY_MASK … macro
Dgc_10_1_0_sh_mask.h6032 #define CP_CPC_STATUS__QU_BUSY_MASK … macro