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Searched refs:CP_DFY_CNTL__ENABLE_MASK (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_8_0_sh_mask.h1293 #define CP_DFY_CNTL__ENABLE_MASK 0x80000000 macro
Dgfx_8_1_sh_mask.h1815 #define CP_DFY_CNTL__ENABLE_MASK 0x80000000 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h10469 #define CP_DFY_CNTL__ENABLE_MASK macro
Dgc_9_1_sh_mask.h11950 #define CP_DFY_CNTL__ENABLE_MASK macro
Dgc_9_2_1_sh_mask.h11757 #define CP_DFY_CNTL__ENABLE_MASK macro