Home
last modified time | relevance | path

Searched refs:CP_HQD_CNTL_STACK_SIZE__SIZE_MASK (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_8_0_sh_mask.h4147 #define CP_HQD_CNTL_STACK_SIZE__SIZE_MASK 0x7000 macro
Dgfx_8_1_sh_mask.h4669 #define CP_HQD_CNTL_STACK_SIZE__SIZE_MASK 0x7000 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h13136 #define CP_HQD_CNTL_STACK_SIZE__SIZE_MASK … macro
Dgc_9_1_sh_mask.h14440 #define CP_HQD_CNTL_STACK_SIZE__SIZE_MASK … macro
Dgc_9_2_1_sh_mask.h14305 #define CP_HQD_CNTL_STACK_SIZE__SIZE_MASK … macro
Dgc_10_3_0_sh_mask.h18647 #define CP_HQD_CNTL_STACK_SIZE__SIZE_MASK … macro
Dgc_10_1_0_sh_mask.h20440 #define CP_HQD_CNTL_STACK_SIZE__SIZE_MASK … macro