Home
last modified time | relevance | path

Searched refs:CP_HQD_EOP_CONTROL__EOP_SIZE_MASK (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_8_0_sh_mask.h4101 #define CP_HQD_EOP_CONTROL__EOP_SIZE_MASK 0x3f macro
Dgfx_8_1_sh_mask.h4623 #define CP_HQD_EOP_CONTROL__EOP_SIZE_MASK 0x3f macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h13086 #define CP_HQD_EOP_CONTROL__EOP_SIZE_MASK … macro
Dgc_9_1_sh_mask.h14390 #define CP_HQD_EOP_CONTROL__EOP_SIZE_MASK … macro
Dgc_9_2_1_sh_mask.h14255 #define CP_HQD_EOP_CONTROL__EOP_SIZE_MASK … macro
Dgc_10_3_0_sh_mask.h18596 #define CP_HQD_EOP_CONTROL__EOP_SIZE_MASK … macro
Dgc_10_1_0_sh_mask.h20389 #define CP_HQD_EOP_CONTROL__EOP_SIZE_MASK … macro