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Searched refs:CP_HQD_EOP_CONTROL__PROCESS_EOP_EN_MASK (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_8_0_sh_mask.h4105 #define CP_HQD_EOP_CONTROL__PROCESS_EOP_EN_MASK 0x1000 macro
Dgfx_8_1_sh_mask.h4627 #define CP_HQD_EOP_CONTROL__PROCESS_EOP_EN_MASK 0x1000 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h13088 #define CP_HQD_EOP_CONTROL__PROCESS_EOP_EN_MASK … macro
Dgc_9_1_sh_mask.h14392 #define CP_HQD_EOP_CONTROL__PROCESS_EOP_EN_MASK … macro
Dgc_9_2_1_sh_mask.h14257 #define CP_HQD_EOP_CONTROL__PROCESS_EOP_EN_MASK … macro
Dgc_10_3_0_sh_mask.h18598 #define CP_HQD_EOP_CONTROL__PROCESS_EOP_EN_MASK … macro
Dgc_10_1_0_sh_mask.h20391 #define CP_HQD_EOP_CONTROL__PROCESS_EOP_EN_MASK … macro