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Searched refs:CP_HQD_SEMA_CMD__RESULT__SHIFT (Results 1 – 8 of 8) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_sh_mask.h3414 #define CP_HQD_SEMA_CMD__RESULT__SHIFT 0x1 macro
Dgfx_8_0_sh_mask.h4048 #define CP_HQD_SEMA_CMD__RESULT__SHIFT 0x1 macro
Dgfx_8_1_sh_mask.h4570 #define CP_HQD_SEMA_CMD__RESULT__SHIFT 0x1 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h13001 #define CP_HQD_SEMA_CMD__RESULT__SHIFT … macro
Dgc_9_1_sh_mask.h14305 #define CP_HQD_SEMA_CMD__RESULT__SHIFT … macro
Dgc_9_2_1_sh_mask.h14170 #define CP_HQD_SEMA_CMD__RESULT__SHIFT … macro
Dgc_10_3_0_sh_mask.h18504 #define CP_HQD_SEMA_CMD__RESULT__SHIFT … macro
Dgc_10_1_0_sh_mask.h20297 #define CP_HQD_SEMA_CMD__RESULT__SHIFT … macro