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Searched refs:CP_HQD_WG_STATE_OFFSET__OFFSET_MASK (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_8_0_sh_mask.h4149 #define CP_HQD_WG_STATE_OFFSET__OFFSET_MASK 0x1fffffc macro
Dgfx_8_1_sh_mask.h4671 #define CP_HQD_WG_STATE_OFFSET__OFFSET_MASK 0x1fffffc macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h13139 #define CP_HQD_WG_STATE_OFFSET__OFFSET_MASK … macro
Dgc_9_1_sh_mask.h14443 #define CP_HQD_WG_STATE_OFFSET__OFFSET_MASK … macro
Dgc_9_2_1_sh_mask.h14308 #define CP_HQD_WG_STATE_OFFSET__OFFSET_MASK … macro
Dgc_10_3_0_sh_mask.h18650 #define CP_HQD_WG_STATE_OFFSET__OFFSET_MASK … macro
Dgc_10_1_0_sh_mask.h20443 #define CP_HQD_WG_STATE_OFFSET__OFFSET_MASK … macro