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Searched refs:CP_INT_CNTL_RING0__CMP_BUSY_INT_ENABLE_MASK (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_8_0_sh_mask.h1499 #define CP_INT_CNTL_RING0__CMP_BUSY_INT_ENABLE_MASK 0x40000 macro
Dgfx_8_1_sh_mask.h2023 #define CP_INT_CNTL_RING0__CMP_BUSY_INT_ENABLE_MASK 0x40000 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h11001 #define CP_INT_CNTL_RING0__CMP_BUSY_INT_ENABLE_MASK … macro
Dgc_9_1_sh_mask.h12482 #define CP_INT_CNTL_RING0__CMP_BUSY_INT_ENABLE_MASK … macro
Dgc_9_2_1_sh_mask.h12286 #define CP_INT_CNTL_RING0__CMP_BUSY_INT_ENABLE_MASK … macro
Dgc_10_3_0_sh_mask.h16195 #define CP_INT_CNTL_RING0__CMP_BUSY_INT_ENABLE_MASK … macro
Dgc_10_1_0_sh_mask.h17946 #define CP_INT_CNTL_RING0__CMP_BUSY_INT_ENABLE_MASK … macro