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Searched refs:CP_INT_STATUS_RING1__GFX_IDLE_INT_STAT_MASK (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_8_0_sh_mask.h1655 #define CP_INT_STATUS_RING1__GFX_IDLE_INT_STAT_MASK 0x200000 macro
Dgfx_8_1_sh_mask.h2179 #define CP_INT_STATUS_RING1__GFX_IDLE_INT_STAT_MASK 0x200000 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h11136 #define CP_INT_STATUS_RING1__GFX_IDLE_INT_STAT_MASK … macro
Dgc_9_1_sh_mask.h12617 #define CP_INT_STATUS_RING1__GFX_IDLE_INT_STAT_MASK … macro
Dgc_9_2_1_sh_mask.h12421 #define CP_INT_STATUS_RING1__GFX_IDLE_INT_STAT_MASK … macro
Dgc_10_3_0_sh_mask.h16342 #define CP_INT_STATUS_RING1__GFX_IDLE_INT_STAT_MASK … macro
Dgc_10_1_0_sh_mask.h18093 #define CP_INT_STATUS_RING1__GFX_IDLE_INT_STAT_MASK … macro