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Searched refs:CP_PFP_METADATA_BASE_ADDR_HI__ADDR_HI__SHIFT (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_8_0_sh_mask.h3384 #define CP_PFP_METADATA_BASE_ADDR_HI__ADDR_HI__SHIFT 0x0 macro
Dgfx_8_1_sh_mask.h3906 #define CP_PFP_METADATA_BASE_ADDR_HI__ADDR_HI__SHIFT 0x0 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h19707 #define CP_PFP_METADATA_BASE_ADDR_HI__ADDR_HI__SHIFT macro
Dgc_9_1_sh_mask.h21018 #define CP_PFP_METADATA_BASE_ADDR_HI__ADDR_HI__SHIFT macro
Dgc_9_2_1_sh_mask.h20945 #define CP_PFP_METADATA_BASE_ADDR_HI__ADDR_HI__SHIFT macro
Dgc_10_3_0_sh_mask.h25876 #define CP_PFP_METADATA_BASE_ADDR_HI__ADDR_HI__SHIFT macro
Dgc_10_1_0_sh_mask.h27560 #define CP_PFP_METADATA_BASE_ADDR_HI__ADDR_HI__SHIFT macro