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Searched refs:CP_RB0_CNTL__MIN_AVAILSZ_MASK (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h2714 #define CP_RB0_CNTL__MIN_AVAILSZ_MASK 0x00300000L macro
Dgfx_7_2_sh_mask.h1047 #define CP_RB0_CNTL__MIN_AVAILSZ_MASK 0x300000 macro
Dgfx_8_0_sh_mask.h1365 #define CP_RB0_CNTL__MIN_AVAILSZ_MASK 0x300000 macro
Dgfx_8_1_sh_mask.h1889 #define CP_RB0_CNTL__MIN_AVAILSZ_MASK 0x300000 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h10701 #define CP_RB0_CNTL__MIN_AVAILSZ_MASK … macro
Dgc_9_1_sh_mask.h12182 #define CP_RB0_CNTL__MIN_AVAILSZ_MASK … macro
Dgc_9_2_1_sh_mask.h11987 #define CP_RB0_CNTL__MIN_AVAILSZ_MASK … macro
Dgc_10_3_0_sh_mask.h15854 #define CP_RB0_CNTL__MIN_AVAILSZ_MASK … macro
Dgc_10_1_0_sh_mask.h17609 #define CP_RB0_CNTL__MIN_AVAILSZ_MASK … macro