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Searched refs:CP_RB_CNTL__CACHE_POLICY_MASK (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h2800 #define CP_RB_CNTL__CACHE_POLICY_MASK 0x03000000L macro
Dgfx_7_2_sh_mask.h1069 #define CP_RB_CNTL__CACHE_POLICY_MASK 0x3000000 macro
Dgfx_8_0_sh_mask.h1387 #define CP_RB_CNTL__CACHE_POLICY_MASK 0x1000000 macro
Dgfx_8_1_sh_mask.h1911 #define CP_RB_CNTL__CACHE_POLICY_MASK 0x1000000 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h10718 #define CP_RB_CNTL__CACHE_POLICY_MASK … macro
Dgc_9_1_sh_mask.h12199 #define CP_RB_CNTL__CACHE_POLICY_MASK … macro
Dgc_9_2_1_sh_mask.h12004 #define CP_RB_CNTL__CACHE_POLICY_MASK … macro
Dgc_10_3_0_sh_mask.h15880 #define CP_RB_CNTL__CACHE_POLICY_MASK … macro
Dgc_10_1_0_sh_mask.h17635 #define CP_RB_CNTL__CACHE_POLICY_MASK … macro