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Searched refs:CP_STAT__ROQ_RING_BUSY_MASK (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h3094 #define CP_STAT__ROQ_RING_BUSY_MASK 0x00000200L macro
Dgfx_7_2_sh_mask.h2969 #define CP_STAT__ROQ_RING_BUSY_MASK 0x200 macro
Dgfx_8_0_sh_mask.h3583 #define CP_STAT__ROQ_RING_BUSY_MASK 0x200 macro
Dgfx_8_1_sh_mask.h4105 #define CP_STAT__ROQ_RING_BUSY_MASK 0x200 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h1092 #define CP_STAT__ROQ_RING_BUSY_MASK … macro
Dgc_9_1_sh_mask.h991 #define CP_STAT__ROQ_RING_BUSY_MASK … macro
Dgc_9_2_1_sh_mask.h958 #define CP_STAT__ROQ_RING_BUSY_MASK … macro
Dgc_10_3_0_sh_mask.h6814 #define CP_STAT__ROQ_RING_BUSY_MASK … macro
Dgc_10_1_0_sh_mask.h6579 #define CP_STAT__ROQ_RING_BUSY_MASK … macro