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Searched refs:CP_WAIT_SEM_ADDR_LO__SEM_ADDR_LO__SHIFT (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h3185 #define CP_WAIT_SEM_ADDR_LO__SEM_ADDR_LO__SHIFT 0x00000003 macro
Dgfx_7_2_sh_mask.h2578 #define CP_WAIT_SEM_ADDR_LO__SEM_ADDR_LO__SHIFT 0x3 macro
Dgfx_8_0_sh_mask.h3142 #define CP_WAIT_SEM_ADDR_LO__SEM_ADDR_LO__SHIFT 0x3 macro
Dgfx_8_1_sh_mask.h3664 #define CP_WAIT_SEM_ADDR_LO__SEM_ADDR_LO__SHIFT 0x3 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h19397 #define CP_WAIT_SEM_ADDR_LO__SEM_ADDR_LO__SHIFT … macro
Dgc_9_1_sh_mask.h20708 #define CP_WAIT_SEM_ADDR_LO__SEM_ADDR_LO__SHIFT … macro
Dgc_9_2_1_sh_mask.h20635 #define CP_WAIT_SEM_ADDR_LO__SEM_ADDR_LO__SHIFT … macro
Dgc_10_3_0_sh_mask.h25494 #define CP_WAIT_SEM_ADDR_LO__SEM_ADDR_LO__SHIFT … macro
Dgc_10_1_0_sh_mask.h27187 #define CP_WAIT_SEM_ADDR_LO__SEM_ADDR_LO__SHIFT … macro