Home
last modified time | relevance | path

Searched refs:CQ (Results 1 – 5 of 5) sorted by relevance

/drivers/ata/
Dsata_fsl.c106 CQ = 0, enumerator
398 if (unlikely((ioread32(hcr_base + CQ)) & (1 << tag))) { in sata_fsl_tag()
563 ioread32(CQ + hcr_base), in sata_fsl_qc_issue()
570 iowrite32(1 << tag, CQ + hcr_base); in sata_fsl_qc_issue()
573 tag, ioread32(CQ + hcr_base), ioread32(CA + hcr_base)); in sata_fsl_qc_issue()
653 ioread32(CQ + hcr_base), in sata_fsl_freeze()
981 ioread32(CQ + hcr_base), in sata_fsl_softreset()
987 iowrite32(1, CQ + hcr_base); in sata_fsl_softreset()
989 temp = ata_wait_register(ap, CQ + hcr_base, 0x1, 0x1, 1, 5000); in sata_fsl_softreset()
994 ioread32(CQ + hcr_base), in sata_fsl_softreset()
[all …]
/drivers/infiniband/hw/usnic/
Dusnic_vnic.h46 DEFINE_USNIC_VNIC_RES(CQ, RES_TYPE_CQ, "CQ") \
/drivers/net/ethernet/marvell/octeontx2/
DKconfig26 , NPA stack pages etc in NDC. Also locks down NIX SQ/CQ/RQ/RSS and
/drivers/net/ethernet/marvell/octeontx2/nic/
Dotx2_txrx.c21 #define CQE_ADDR(CQ, idx) ((CQ)->cqe_base + ((CQ)->cqe_size * (idx))) argument
/drivers/net/ethernet/intel/ice/
Dice_lan_tx_rx.h373 #define GLTCLAN_CQ_CNTX(i, CQ) (GLTCLAN_CQ_CNTX0(CQ) + ((i) * 0x0800)) argument