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Searched refs:DBG_WCH0_INT_MSK (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/hisilicon/kirin/
Dkirin_dpe_reg.h72 #define DBG_WCH0_INT_MSK (0x0248) macro
Dkirin_drm_dpe.c252 writel(mask, base + DPE_DBG_OFFSET + DBG_WCH0_INT_MSK); in dpe_interrupt_mask()