Searched refs:DCHUBBUB_GLOBAL_TIMER_CNTL (Results 1 – 9 of 9) sorted by relevance
/drivers/gpu/drm/amd/display/dc/dcn10/ |
D | dcn10_hubbub.h | 48 SR(DCHUBBUB_GLOBAL_TIMER_CNTL), \ 104 uint32_t DCHUBBUB_GLOBAL_TIMER_CNTL; member 149 HUBBUB_SF(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_ENABLE, mask_sh), \
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D | dcn10_hw_sequencer.c | 1282 REG_UPDATE(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_ENABLE, 1); in dcn10_init_hw()
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/drivers/gpu/drm/amd/display/dc/dce/ |
D | dce_hwseq.h | 167 SR(DCHUBBUB_GLOBAL_TIMER_CNTL), \ 382 uint32_t DCHUBBUB_GLOBAL_TIMER_CNTL; member 547 HWS_SF(, DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_ENABLE, mask_sh), \ 609 HWS_SF(, DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, mask_sh), \ 668 HWS_SF(, DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, mask_sh), \
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/drivers/gpu/drm/amd/display/dc/dcn20/ |
D | dcn20_hubbub.h | 66 HUBBUB_SF(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, mask_sh), \
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D | dcn20_hubbub.c | 550 REG_GET_2(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, &ref_div, in hubbub2_get_dchub_ref_freq()
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D | dcn20_hwseq.c | 2441 REG_UPDATE(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, 2); in dcn20_fpga_init_hw() 2442 REG_UPDATE(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_ENABLE, 1); in dcn20_fpga_init_hw()
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/drivers/gpu/drm/amd/display/dc/dcn30/ |
D | dcn30_hubbub.h | 56 HUBBUB_SF(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, mask_sh), \
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D | dcn30_hwseq.c | 451 REG_UPDATE(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_ENABLE, 1); in dcn30_init_hw()
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/drivers/gpu/drm/amd/display/dc/dcn21/ |
D | dcn21_hubbub.h | 105 HUBBUB_SF(DCHUBBUB_GLOBAL_TIMER_CNTL, DCHUBBUB_GLOBAL_TIMER_REFDIV, mask_sh), \
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