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Searched refs:DCN20_CLK_SRC_PLL0 (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dcn21/
Ddcn21_resource.c902 DCN20_CLK_SRC_PLL0, enumerator
1886 pool->base.clock_sources[DCN20_CLK_SRC_PLL0] = in dcn21_resource_construct()
/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_resource.c472 DCN20_CLK_SRC_PLL0, enumerator
3875 pool->base.clock_sources[DCN20_CLK_SRC_PLL0] =