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Searched refs:DCN_BASE__INST0_SEG1 (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/amd/include/
Dnavi10_ip_offset.h268 #define DCN_BASE__INST0_SEG1 0x000000C0 macro
Dsienna_cichlid_ip_offset.h371 #define DCN_BASE__INST0_SEG1 0x000000C0 macro
Dvega10_ip_offset.h306 #define DCN_BASE__INST0_SEG1 0x000000C0 macro
Drenoir_ip_offset.h1370 #define DCN_BASE__INST0_SEG1 0x000000C0 macro