Searched refs:DC_IP_REQUEST_CNTL (Results 1 – 3 of 3) sorted by relevance
| /drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_hwseq.h | 225 SR(DC_IP_REQUEST_CNTL)
312 SR(DC_IP_REQUEST_CNTL)
362 SR(DC_IP_REQUEST_CNTL)
388 uint32_t DC_IP_REQUEST_CNTL; member
593 HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh), \
664 HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh)
704 HWS_SF(, DC_IP_REQUEST_CNTL, IP_REQUEST_EN, mask_sh)
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| /drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_hw_sequencer.c | 646 if (REG(DC_IP_REQUEST_CNTL)) { in power_on_plane()
647 REG_SET(DC_IP_REQUEST_CNTL, 0, in power_on_plane()
656 REG_SET(DC_IP_REQUEST_CNTL, 0, in power_on_plane()
673 REG_SET(DC_IP_REQUEST_CNTL, 0, in undo_DEGVIDCN10_253_wa()
677 REG_SET(DC_IP_REQUEST_CNTL, 0, in undo_DEGVIDCN10_253_wa()
702 REG_SET(DC_IP_REQUEST_CNTL, 0, in apply_DEGVIDCN10_253_wa()
706 REG_SET(DC_IP_REQUEST_CNTL, 0, in apply_DEGVIDCN10_253_wa()
1084 if (REG(DC_IP_REQUEST_CNTL)) { in dcn10_plane_atomic_power_down()
1085 REG_SET(DC_IP_REQUEST_CNTL, 0, in dcn10_plane_atomic_power_down()
1095 REG_SET(DC_IP_REQUEST_CNTL, 0, in dcn10_plane_atomic_power_down()
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| /drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_hwseq.c | 353 REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl); in dcn20_dsc_pg_control()
355 REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1); in dcn20_dsc_pg_control()
412 REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 0); in dcn20_dsc_pg_control()
1069 if (REG(DC_IP_REQUEST_CNTL)) { in dcn20_power_on_plane()
1070 REG_SET(DC_IP_REQUEST_CNTL, 0, in dcn20_power_on_plane()
1079 REG_SET(DC_IP_REQUEST_CNTL, 0, in dcn20_power_on_plane()
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