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Searched refs:DIDT_SQ_CTRL0__DIDT_CTRL_EN_MASK (Results 1 – 11 of 11) sorted by relevance

/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dsmu7_powertune.c142 …{ ixDIDT_SQ_CTRL0, DIDT_SQ_CTRL0__DIDT_CTRL_EN_MASK, DIDT_SQ…
284 …{ ixDIDT_SQ_CTRL0, DIDT_SQ_CTRL0__DIDT_CTRL_EN_MASK, DIDT_SQ…
426 …{ ixDIDT_SQ_CTRL0, DIDT_SQ_CTRL0__DIDT_CTRL_EN_MASK, DIDT_SQ…
569 …{ ixDIDT_SQ_CTRL0, DIDT_SQ_CTRL0__DIDT_CTRL_EN_MASK, DIDT_SQ…
752 …{ ixDIDT_SQ_CTRL0, DIDT_SQ_CTRL0__DIDT_CTRL_EN_MASK, DIDT_SQ…
Dvega10_powertune.c211 …{ ixDIDT_SQ_CTRL0, DIDT_SQ_CTRL0__DIDT_CTRL_EN_MASK, DIDT_SQ_CTRL0__DIDT_CTRL…
/drivers/gpu/drm/amd/pm/powerplay/
Dkv_dpm.c467 data |= DIDT_SQ_CTRL0__DIDT_CTRL_EN_MASK; in kv_do_enable_didt()
469 data &= ~DIDT_SQ_CTRL0__DIDT_CTRL_EN_MASK; in kv_do_enable_didt()
/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_sh_mask.h18267 #define DIDT_SQ_CTRL0__DIDT_CTRL_EN_MASK 0x1 macro
Dgfx_8_0_sh_mask.h20485 #define DIDT_SQ_CTRL0__DIDT_CTRL_EN_MASK 0x1 macro
Dgfx_8_1_sh_mask.h21087 #define DIDT_SQ_CTRL0__DIDT_CTRL_EN_MASK 0x1 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h28747 #define DIDT_SQ_CTRL0__DIDT_CTRL_EN_MASK macro
Dgc_9_1_sh_mask.h29967 #define DIDT_SQ_CTRL0__DIDT_CTRL_EN_MASK macro
Dgc_9_2_1_sh_mask.h30290 #define DIDT_SQ_CTRL0__DIDT_CTRL_EN_MASK macro
Dgc_10_3_0_sh_mask.h46729 #define DIDT_SQ_CTRL0__DIDT_CTRL_EN_MASK macro
Dgc_10_1_0_sh_mask.h42960 #define DIDT_SQ_CTRL0__DIDT_CTRL_EN_MASK macro