Home
last modified time | relevance | path

Searched refs:DIDT_TD_CTRL0__PHASE_OFFSET__SHIFT (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dsmu7_powertune.c187 … DIDT_TD_CTRL0__PHASE_OFFSET_MASK, DIDT_TD_CTRL0__PHASE_OFFSET__SHIFT, …
329 … DIDT_TD_CTRL0__PHASE_OFFSET_MASK, DIDT_TD_CTRL0__PHASE_OFFSET__SHIFT, …
471 … DIDT_TD_CTRL0__PHASE_OFFSET_MASK, DIDT_TD_CTRL0__PHASE_OFFSET__SHIFT, …
615 … DIDT_TD_CTRL0__PHASE_OFFSET_MASK, DIDT_TD_CTRL0__PHASE_OFFSET__SHIFT, …
799 … DIDT_TD_CTRL0__PHASE_OFFSET_MASK, DIDT_TD_CTRL0__PHASE_OFFSET__SHIFT, …
Dvega10_powertune.c224 …RL0, DIDT_TD_CTRL0__PHASE_OFFSET_MASK, DIDT_TD_CTRL0__PHASE_OFFSET__SHIFT, 0x…
/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_sh_mask.h18360 #define DIDT_TD_CTRL0__PHASE_OFFSET__SHIFT 0x2 macro
Dgfx_8_0_sh_mask.h20598 #define DIDT_TD_CTRL0__PHASE_OFFSET__SHIFT 0x2 macro
Dgfx_8_1_sh_mask.h21204 #define DIDT_TD_CTRL0__PHASE_OFFSET__SHIFT 0x2 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h29221 #define DIDT_TD_CTRL0__PHASE_OFFSET__SHIFT macro
Dgc_9_1_sh_mask.h30432 #define DIDT_TD_CTRL0__PHASE_OFFSET__SHIFT macro
Dgc_9_2_1_sh_mask.h30705 #define DIDT_TD_CTRL0__PHASE_OFFSET__SHIFT macro
Dgc_10_3_0_sh_mask.h47242 #define DIDT_TD_CTRL0__PHASE_OFFSET__SHIFT macro
Dgc_10_1_0_sh_mask.h43477 #define DIDT_TD_CTRL0__PHASE_OFFSET__SHIFT macro