Searched refs:DOMAIN1_PG_STATUS (Results 1 – 3 of 3) sorted by relevance
| /drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_hwseq.h | 213 SR(DOMAIN1_PG_STATUS), \
289 SR(DOMAIN1_PG_STATUS), \
346 SR(DOMAIN1_PG_STATUS), \
408 uint32_t DOMAIN1_PG_STATUS; member
586 HWS_SF(, DOMAIN1_PG_STATUS, DOMAIN1_PGFSM_PWR_STATUS, mask_sh), \
647 HWS_SF(, DOMAIN1_PG_STATUS, DOMAIN1_PGFSM_PWR_STATUS, mask_sh), \
694 HWS_SF(, DOMAIN1_PG_STATUS, DOMAIN1_PGFSM_PWR_STATUS, mask_sh), \
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| /drivers/gpu/drm/amd/display/dc/dcn20/ |
| D | dcn20_hwseq.c | 433 REG_WAIT(DOMAIN1_PG_STATUS, in dcn20_dpp_pg_control()
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| /drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_hw_sequencer.c | 555 REG_WAIT(DOMAIN1_PG_STATUS, in dcn10_dpp_pg_control()
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