Home
last modified time | relevance | path

Searched refs:DPCS_BASE__INST1_SEG1 (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/amd/include/
Dnavi12_ip_offset.h412 #define DPCS_BASE__INST1_SEG1 0 macro
Dnavi14_ip_offset.h412 #define DPCS_BASE__INST1_SEG1 0 macro
Dsienna_cichlid_ip_offset.h419 #define DPCS_BASE__INST1_SEG1 0 macro
Drenoir_ip_offset.h536 #define DPCS_BASE__INST1_SEG1 0 macro