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Searched refs:DPCS_BASE__INST4_SEG1 (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/amd/include/
Dnavi12_ip_offset.h430 #define DPCS_BASE__INST4_SEG1 0 macro
Dnavi14_ip_offset.h430 #define DPCS_BASE__INST4_SEG1 0 macro
Dsienna_cichlid_ip_offset.h437 #define DPCS_BASE__INST4_SEG1 0 macro
Drenoir_ip_offset.h554 #define DPCS_BASE__INST4_SEG1 0 macro