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Searched refs:DWB_OGAM_RAMA_REGION_4_5 (Results 1 – 1 of 1) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_dwb.h103 SR(DWB_OGAM_RAMA_REGION_4_5),\
270 SF_DWB2(DWB_OGAM_RAMA_REGION_4_5, DWBCP, 0, DWB_OGAM_RAMA_EXP_REGION4_LUT_OFFSET, mask_sh),\
271 SF_DWB2(DWB_OGAM_RAMA_REGION_4_5, DWBCP, 0, DWB_OGAM_RAMA_EXP_REGION4_NUM_SEGMENTS, mask_sh),\
272 SF_DWB2(DWB_OGAM_RAMA_REGION_4_5, DWBCP, 0, DWB_OGAM_RAMA_EXP_REGION5_LUT_OFFSET, mask_sh),\
273 SF_DWB2(DWB_OGAM_RAMA_REGION_4_5, DWBCP, 0, DWB_OGAM_RAMA_EXP_REGION5_NUM_SEGMENTS, mask_sh),\
808 uint32_t DWB_OGAM_RAMA_REGION_4_5; member